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    74HC138 DECODER Search Results

    74HC138 DECODER Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TC4511BP
    Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, BCD-to-7-Segment Decoder, DIP16 Datasheet
    74HC4051FT
    Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SP8T(1:8)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Datasheet
    TC7MBL3257CFT
    Toshiba Electronic Devices & Storage Corporation Quad 1-of-2 Multiplexer/Demultiplexer, SPDT, TSSOP16, -40 to 85 degC Datasheet
    TC7PCI3212MT
    Toshiba Electronic Devices & Storage Corporation 2 Differential Channel, 2:1 multiplexer/demultiplexer, SPDT, TQFN20, -40 to 85 degC Datasheet
    TC7SB3157DL6X
    Toshiba Electronic Devices & Storage Corporation Single 1-of-2 Multiplexer/Demultiplexer, SPDT, MP6D, -40 to 85 degC Datasheet

    74HC138 DECODER Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    74HC138

    Abstract: related circuit of 74HC138 001aae059 74HC-HCT138 74hc138bq hct138 74HC138 using for testing equipment 74HC138D 74HC138N 74HC138DB
    Contextual Info: 74HC138; 74HCT138 3-to-8 line decoder/demultiplexer; inverting Rev. 4 — 27 June 2012 Product data sheet 1. General description The 74HC138; 74HCT138 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . The 74HC138; 74HCT138 decoder accepts three binary weighted address inputs (A0, A1


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    74hc13874hct138related circuit of 74hc138001aae059+774hc-hct13874hc138bqhct13874hc138 using for testing equipment74hc138d74hc138n74hc138db PDF

    74HC138

    Abstract: hct138d 74HC138D HCT138 74HC138 philips 74HC138DB 74HC138N 74HC138PW 74HCT138 74HCT138N
    Contextual Info: 74HC138; 74HCT138 3-to-8 line decoder/demultiplexer; inverting Product data sheet 1. General description The 74HC138; 74HCT138 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . The 74HC138; 74HCT138 decoder accepts three binary weighted address inputs (A0, A1


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    74hc13874hct138hct138d74hc138d+6hct13874hc138 philips74hc138db74hc138n74hc138pw74hct138n PDF

    74HC138

    Abstract: hct138d 74HCT138 74HC138D 74HC138DB 74HC138N 74HC138PW MNA370 74HC-HCT138 74HC138 philips
    Contextual Info: 74HC138; 74HCT138 3-to-8 line decoder/demultiplexer; inverting Product data sheet 1. General description The 74HC138; 74HCT138 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . The 74HC138; 74HCT138 decoder accepts three binary weighted address inputs (A0, A1


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    74hc13874hct138hct138d74hc138d+674hc138db74hc138n74hc138pwmna37074hc-hct13874hc138 philips PDF

    74HC_HCT138

    Abstract: 74HC138 data sheet 74HC138 EQUIVALENT 74HCT138 74HC138DB 74HC138N hct138d 74HC138 philips 74HCT138 74HC138PW
    Contextual Info: 74HC138; 74HCT138 3-to-8 line decoder/demultiplexer; inverting Rev. 03 — 23 December 2005 Product data sheet 1. General description The 74HC138; 74HCT138 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . The 74HC138; 74HCT138 decoder accepts three binary weighted address inputs (A0, A1


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    74hc13874hct13874hc_hct138data sheet 74hc138+6equivalent 74hct13874hc138db74hc138nhct138d74hc138 philips74hc138pw PDF

    Contextual Info: 74HC138; 74HCT138 3-to-8 line decoder/demultiplexer; inverting Rev. 4 — 27 June 2012 Product data sheet 1. General description The 74HC138; 74HCT138 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . The 74HC138; 74HCT138 decoder accepts three binary weighted address inputs (A0, A1


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    74hc13874hct138 PDF

    74HC138

    Abstract: 001aae059 74HC138PW 74HCT138 hct138d 74HCT138-Q100 74HC138-Q100 74HC138 using for testing equipment 74hc138bq 74HC-HCT138
    Contextual Info: 74HC138-Q100; 74HCT138-Q100 3-to-8 line decoder/demultiplexer; inverting Rev. 1 — 16 July 2012 Product data sheet 1. General description The 74HC138-Q100; 74HCT138-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL .


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    74hc138-q10074hct138-q10074hc138001aae059+674hc138pw74hct138hct138d74hc138 using for testing equipment74hc138bq74hc-hct138 PDF

    74HC138

    Abstract: DS35488
    Contextual Info: 74HC138 3 TO 8 LINE DECODER DEMULTIPLEXER Description Pin Assignments The 74HC138 is a high speed CMOS device. The device accepts a three bit binary weighted address on input pins A0, A1 and A2 and when enabled will produce one active low output with the remaing seven being high.


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    74hc1384-to-165-to-32ds35488 PDF

    74HC138

    Abstract: DS35488
    Contextual Info: 74HC138 3 TO 8 LINE DECODER DEMULTIPLEXER Description Pin Assignments The 74HC138 is a high speed CMOS device. The device accepts a three bit binary weighted address on input pins A0, A1 and A2 and when enabled will produce one active low output with the remaing seven being high.


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    74hc1384-to-165-to-32ds35488 PDF

    74HC138

    Abstract: HC138G 74HC138DR2G 74HC138DTR2G HC138 74HC138D 74HC138DR 948F LS138
    Contextual Info: 74HC138 1−of−8 Decoder/ Demultiplexer High−Performance Silicon−Gate CMOS The 74HC138 is identical in pinout to the LS138. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC138 decodes a three−bit Address to one−of−eight active−low


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    74hc138ls138hc138soic-16+6hc138g74hc138dr2g74hc138dtr2g74hc138d74hc138dr948f PDF

    Ic 74hc138 logic diagram

    Contextual Info: 74HC138-Q100; 74HCT138-Q100 3-to-8 line decoder/demultiplexer; inverting Rev. 1 — 16 July 2012 Product data sheet 1. General description The 74HC138-Q100; 74HCT138-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL .


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    74hc138-q10074hct138-q100ic 74hc138 logic diagram PDF

    74HC138

    Abstract: 74HC138DR HC138G 74HC138D 74HC138DR2G 74HC138DTR2G D74HC138 HC138 948F LS138
    Contextual Info: 74HC138 1−of−8 Decoder/ Demultiplexer High−Performance Silicon−Gate CMOS The 74HC138 is identical in pinout to the LS138. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC138 decodes a three−bit Address to one−of−eight active−low


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    74hc138ls138hc13874hc138/d+774hc138drhc138g74hc138d74hc138dr2g74hc138dtr2gd74hc138948f PDF

    74HC138

    Abstract: HC138 74HCT238 74HCT13 CD54HC138F3A CD54HC238F3A CD54HCT138F3A CD54HCT238F3A CD74HC138E CD74HC138M
    Contextual Info: [ /Title CD74 HC138 , CD74 HCT13 8, CD74 HC238 , CD74 HCT23 8 /Subject (High Speed CD54/74HC138, CD54/74HCT138, CD54/74HC238, CD54/74HCT238 Data sheet acquired from Harris Semiconductor SCHS147H October 1997 - Revised May 2004 High-Speed CMOS Logic 3- to 8-Line Decoder/


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    hc138hct13hc238hct23+14cd54/74hc138cd54/74hct138cd54/74hc238cd54/74hct238schs147hcd54hc138f3a74hc13874hct23874hct13cd54hc238f3acd54hct138f3acd54hct238f3acd74hc138ecd74hc138m PDF

    74HC138

    Abstract: CD74HC138M96 CD74HC138MT CD54HC138F3A CD54HC238F3A CD54HCT138F3A CD54HCT238F3A CD74HC138E CD74HC138M
    Contextual Info: [ /Title CD74 HC138 , CD74 HCT13 8, CD74 HC238 , CD74 HCT23 8 /Subject (High Speed CD54/74HC138, CD54/74HCT138, CD54/74HC238, CD54/74HCT238 Data sheet acquired from Harris Semiconductor SCHS147I October 1997 - Revised August 2004 High-Speed CMOS Logic 3- to 8-Line Decoder/


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    hc138hct13hc238hct23+14cd54/74hc138cd54/74hct138cd54/74hc238cd54/74hct238schs147icd54hc138f3a74hc138cd74hc138m96cd74hc138mtcd54hc238f3acd54hct138f3acd54hct238f3acd74hc138ecd74hc138m PDF

    74HC138

    Abstract: CD74HC138MT CD74HC138M96E4 CD54HC138F3A CD54HC238F3A CD54HCT138F3A CD54HCT238F3A CD74HC138E CD74HC138M
    Contextual Info: [ /Title CD74 HC138 , CD74 HCT13 8, CD74 HC238 , CD74 HCT23 8 /Subject (High Speed CD54/74HC138, CD54/74HCT138, CD54/74HC238, CD54/74HCT238 Data sheet acquired from Harris Semiconductor SCHS147I October 1997 - Revised August 2004 High-Speed CMOS Logic 3- to 8-Line Decoder/


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    hc138hct13hc238hct23+14cd54/74hc138cd54/74hct138cd54/74hc238cd54/74hct238schs147icd54hc138f3a74hc138cd74hc138mtcd74hc138m96e4cd54hc238f3acd54hct138f3acd54hct238f3acd74hc138ecd74hc138m PDF

    74HC138

    Contextual Info: [ /Title CD74 HC138 , CD74 HCT13 8, CD74 HC238 , CD74 HCT23 8 /Subject (High Speed CD54/74HC138, CD54/74HCT138, CD54/74HC238, CD54/74HCT238 Data sheet acquired from Harris Semiconductor SCHS147I October 1997 - Revised August 2004 High-Speed CMOS Logic 3- to 8-Line Decoder/


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    cd54/74hc138cd54/74hct138cd54/74hc238cd54/74hct238+7schs147icd54hc138f3acd54hc238f3acd54hct138f3acd54hct238f3acd74hc138e74hc138 PDF

    74HC138 MSI CMOS

    Abstract: 74HC138 CD74HC138M CD74HC138M96 CD74HC138MT CD74HC138M96E4
    Contextual Info: [ /Title CD74 HC138 , CD74 HCT13 8, CD74 HC238 , CD74 HCT23 8 /Subject (High Speed CD54/74HC138, CD54/74HCT138, CD54/74HC238, CD54/74HCT238 Data sheet acquired from Harris Semiconductor SCHS147I October 1997 - Revised August 2004 High-Speed CMOS Logic 3- to 8-Line Decoder/


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    cd54/74hc138cd54/74hct138cd54/74hc238cd54/74hct238+12schs147icd54hc138f3acd54hc238f3acd54hct138f3acd54hct238f3acd74hc138e74hc138 msi cmos74hc138cd74hc138mcd74hc138m96cd74hc138mtcd74hc138m96e4 PDF

    74HC138

    Abstract: 74HC138 using for testing equipment CD74HC138M96 CD74HC138MT CD74HC138M96E4
    Contextual Info: [ /Title CD74 HC138 , CD74 HCT13 8, CD74 HC238 , CD74 HCT23 8 /Subject (High Speed CD54/74HC138, CD54/74HCT138, CD54/74HC238, CD54/74HCT238 Data sheet acquired from Harris Semiconductor SCHS147I October 1997 - Revised August 2004 High-Speed CMOS Logic 3- to 8-Line Decoder/


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    cd54/74hc138cd54/74hct138cd54/74hc238cd54/74hct238+11schs147icd54hc138f3acd54hc238f3acd54hct138f3acd54hct238f3acd74hc138e74hc13874hc138 using for testing equipmentcd74hc138m96cd74hc138mtcd74hc138m96e4 PDF

    Contextual Info: [ /Title CD74 HC138 , CD74 HCT13 8, CD74 HC238 , CD74 HCT23 8 /Subject (High Speed CD54/74HC138, CD54/74HCT138, CD54/74HC238, CD54/74HCT238 Data sheet acquired from Harris Semiconductor SCHS147I October 1997 - Revised August 2004 High-Speed CMOS Logic 3- to 8-Line Decoder/


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    hc138hct13hc238hct23+6cd54/74hc138cd54/74hct138cd54/74hc238cd54/74hct238schs147icd54hc138f3a PDF

    CD74HC138MT

    Abstract: CD74HC138M96E4 74HC138
    Contextual Info: [ /Title CD74 HC138 , CD74 HCT13 8, CD74 HC238 , CD74 HCT23 8 /Subject (High Speed CD54/74HC138, CD54/74HCT138, CD54/74HC238, CD54/74HCT238 Data sheet acquired from Harris Semiconductor SCHS147I October 1997 - Revised August 2004 High-Speed CMOS Logic 3- to 8-Line Decoder/


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    cd54/74hc138cd54/74hct138cd54/74hc238cd54/74hct238+9schs147icd54hc138f3acd54hc238f3acd54hct138f3acd54hct238f3acd74hc138ecd74hc138mtcd74hc138m96e474hc138 PDF

    hct138

    Abstract: HC238 HC138 Harris texas instruments ttl data book
    Contextual Info: [ /Title CD74 HC138 , CD74 HCT13 8, CD74 HC238 , CD74 HCT23 8 /Subject (High Speed CD54/74HC138, CD54/74HCT138, CD54/74HC238, CD54/74HCT238 Data sheet acquired from Harris Semiconductor SCHS147E October 1997 - Revised July 2002 High Speed CMOS Logic 3-to-8 Line Decoder/


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    cd54/74hc138cd54/74hct138cd54/74hc238cd54/74hct238+10schs147ecd54hc138fcd54hc138f3acd74hc138ecd74hc138mcd74hc138m96hct138hc238hc138 harristexas instruments ttl data book PDF

    74HC138

    Abstract: 74HC238 CD74HC138M96E4 CD74HC138M96 CD74HC138MT CD54HC138F3A CD54HC238F3A CD54HCT138F3A CD54HCT238F3A CD74HC138E
    Contextual Info: [ /Title CD74 HC138 , CD74 HCT13 8, CD74 HC238 , CD74 HCT23 8 /Subject (High Speed CD54/74HC138, CD54/74HCT138, CD54/74HC238, CD54/74HCT238 Data sheet acquired from Harris Semiconductor SCHS147I October 1997 - Revised August 2004 High-Speed CMOS Logic 3- to 8-Line Decoder/


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    hc138hct13hc238hct23+15cd54/74hc138cd54/74hct138cd54/74hc238cd54/74hct238schs147icd54hc138f3a74hc13874hc238cd74hc138m96e4cd74hc138m96cd74hc138mtcd54hc238f3acd54hct138f3acd54hct238f3acd74hc138e PDF

    Contextual Info: [ /Title CD74 HC138 , CD74 HCT13 8, CD74 HC238 , CD74 HCT23 8 /Subject (High Speed CD54/74HC138, CD54/74HCT138, CD54/74HC238, CD54/74HCT238 Data sheet acquired from Harris Semiconductor SCHS147I October 1997 - Revised August 2004 High-Speed CMOS Logic 3- to 8-Line Decoder/


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    hc138hct13hc238hct23+6cd54/74hc138cd54/74hct138cd54/74hc238cd54/74hct238schs147icd54hc138f3a PDF

    74HCT238

    Abstract: 74HC138 ic 74HC138 HC138 74HC238 data sheet 74HC138 CD54HC138F CD54HC138F3A CD54HCT138F CD54HCT138F3A
    Contextual Info: [ /Title CD74 HC138 , CD74 HCT13 8, CD74 HC238 , CD74 HCT23 8 /Subject (High Speed CD54/74HC138, CD54/74HCT138, CD54/74HC238, CD54/74HCT238 Data sheet acquired from Harris Semiconductor SCHS147D October 1997 - Revised April 2002 High Speed CMOS Logic 3-to-8 Line Decoder/


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    hc138hct13hc238hct23+14cd54/74hc138cd54/74hct138cd54/74hc238cd54/74hct238schs147dcd54hc138f74hct23874hc138ic 74hc13874hc238data sheet 74hc138cd54hc138f3acd54hct138fcd54hct138f3a PDF

    74HC138

    Abstract: CD74HC138M96
    Contextual Info: [ /Title CD74 HC138 , CD74 HCT13 8, CD74 HC238 , CD74 HCT23 8 /Subject (High Speed CD54/74HC138, CD54/74HCT138, CD54/74HC238, CD54/74HCT238 Data sheet acquired from Harris Semiconductor SCHS147I October 1997 - Revised August 2004 High-Speed CMOS Logic 3- to 8-Line Decoder/


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    cd54/74hc138cd54/74hct138cd54/74hc238cd54/74hct238+8schs147icd54hc138f3acd54hc238f3acd54hct138f3acd54hct238f3acd74hc138e74hc138cd74hc138m96 PDF