74H101PC Search Results

74H101PC Datasheets (1)

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Fairchild Semiconductor

Part	ECAD Model	Manufacturer	Description	Datasheet Type	PDF	PDF Size	Page count
74H101PC		Fairchild Semiconductor	JK Edge Triggered Flip-Flop	Scan	PDF	66.32KB	2

74H101PC Price and Stock

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Rochester Electronics LLC


Rochester Electronics LLC 74H101PC Flip Flop Negative Edge 2 Element 5V 14-DIP Tube
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Rochester Electronics	74H101PC		1,684		1	1 $48.26 10 $48.26 100 $45.36 1000 $42.47 10000 $42.47	Buy Now

74H101PC Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
74H101 Contextual Info: n a t i o n a l s e n I c o n d -clogio 0 2 e d I b s o n a B Got377s 3 I T -^ 6 -0 7 '0 7 101 CO N N ECTIO N DIAGRAM S PINO UT A 54H/74H101 JK EDGE-TRIGGERED FLIP-FLOP (with A N D - O R Inputs D ESC R IP TIO N — The '101 is a high speed J K negative edge-triggered flipflop. The AND-OR gate inputs are inhibited while the clock input is LOW.	OCR Scan	got377s 54h/74h101 54/74h 74h101	PDF
IC LA 4138 Contextual Info: 101 CONNECTION DIAGRAMS P IN O U T A 54H/74H101 0 JK EDGE-TRIGGERED FLIP-FLOP with A N D -O R Inputs DESCRIPTION — The '101 is a high speed J K negative edge-triggered flipflop. The A N D -O R gate inputs are inhibited w hile the clo ck input is LOW. When the clo ck goes HIGH, the inputs are enabled and data will be accepted.	OCR Scan	54h/74h101 54/74h ic la 4138	PDF
100414DC Abstract: 5401DM Fairchild dtl catalog fsa2719m 4727BPC FCM7010 FCM7004 937DMQB fairchild rtl FSA2501 Contextual Info: FAIRMONT ELECTRONICS PTY. LTD. TE L.48-6421 4 8 -6 4 8 1 /2 /4 C AB LES ' FAIRTRONICS' C R A IG H A L L T E L E X 8-3227 S A . P O .BOX 41102, C R A IG H A LL 2024. I ouani v-ox 39! 262Bramley 2018 FAIRCHILD 464 Ellis Street, M ountain View, C alifornia 94042	OCR Scan	262bramley orporation/464 962-5011/twx 19-pin +10100414dc 5401dm fairchild dtl catalog fsa2719m 4727bpc fcm7010 fcm7004 937dmqb fairchild rtl fsa2501	PDF
74H101 Abstract: 54H101 54H101FM 74H101DC 74H101FC 74H101PC 74hcl Contextual Info: 101 CO N N ECTIO N DIAGRAMS P IN O U T A 54H/74H101 0 JK EDGE-TRIGGERED FLIP-FLOP with AND-OR Inputs D E S C R IP T IO N — The '101 is a high speed J K negative edge-triggered flip flop. T he A N D-O R gate inputs are inhibited while the clock input is LOW.	OCR Scan	54h/74h101 54/74h 74h101 54h101 +554h101fm 74h101dc 74h101fc 74h101pc 74hcl	PDF