74GTL16 Search Results

TSSOP64

Abstract: 74GTL1655A 74GTL1655ATTR
Contextual Info: 74GTL1655A 16 BIT LVTTL TO GTL/GTL + UNIVERSAL BUS TRANSCEIVERS WITH LIVE INSERTION • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED GTL/GTL+ UNIVERSAL TRANSCEIVER: tPD = 4.6 ns MAX. A to B at VCC = 3V COMBINES D-TYPE LATCHES AND D-TYPE FLIP-FLOPS FOR OPERATION IN

74GTL1655

Abstract: 74GTL1655TTR TSSOP64
Contextual Info: 74GTL1655 16 BIT LVTTL TO GTL/GTL + UNIVERSAL BUS TRANSCEIVERS WITH LIVE INSERTION • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED GTL/GTL+ UNIVERSAL TRANSCEIVER : tPD = 4.6 ns MAX. A to B at VCC = 3V COMBINES D-TYPE LATCHES AND D-TYPE FLIP-FLOPS FOR OPERATION IN

TSSOP64

Abstract: 74GTL1655A 74GTL1655ATTR TSSOP64 package
Contextual Info: 74GTL1655A 16 BIT LVTTL TO GTL/GTL + UNIVERSAL BUS TRANSCEIVERS WITH LIVE INSERTION • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED GTL/GTL+ UNIVERSAL TRANSCEIVER: tPD = 4.6 ns MAX. A to B at VCC = 3V COMBINES D-TYPE LATCHES AND D-TYPE FLIP-FLOPS FOR OPERATION IN

Universal Transceivers

Abstract: 74GTL1655 AN1691 GTL1655
Contextual Info: AN1691 APPLICATION NOTE LIVE INSERTION WITH THE ST’S 74GTL1655 M. PORTO 1. ABSTRACT Many Telecom and Networking applications require an interface between cards operating at LVTTL logic levels and a back plane operating at GTL/GTL+ signal levels with possible translation from LVTTL to

74GTL1655

Abstract: 74GTL1655TTR TSSOP64 l30pf
Contextual Info: 74GTL1655 16 BIT LVTTL TO GTL/GTL + UNIVERSAL BUS TRANSCEIVERS WITH LIVE INSERTION • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED GTL/GTL+ UNIVERSAL TRANSCEIVER : tPD = 4.6 ns MAX. A to B at VCC = 3V COMBINES D-TYPE LATCHES AND D-TYPE FLIP-FLOPS FOR OPERATION IN

Contextual Info: Philips Semiconductors Preliminary specification 18-bit LVTTL-to-GTL and transceivers FEATURES 74GTL16622 The B port operates at GTL V t t = 1.2 V and Vf,EF = 0.8 V and GTL+ ( V jr = 1 .5 V and V r e f = 1 V) levels, while the A port and control Inputs are compatible with LVTTL logic levels.

Contextual Info: Philips Semiconductors Preliminary specification 18-bit universal GTL to ALVT/LVT translating bus transceiver 3-State _ .r T . 1 0 FEATURES DESCRIPTION • 18-bit bidirectional bus interface The 74GTL16612 is a high-performance BiCMOS product designed for VCc operation at 2.5V and 3.3V with I/O compatibility up to 5V.

Contextual Info: www.ti.com 74GTL16622A 18-BIT LVTTL-TO-GTL/GTL+ BUS TRANSCEIVER SCBS673F – AUGUST 1996 – REVISED APRIL 2005 FEATURES • • • • • • • • • • Member of Texas Instruments Widebus Family OEC™ Circuitry Improves Signal Integrity and

traffic light controller microprocessor

Abstract: focal cub Dynamic traffic light controller ALI-25 ALI-25C SALI-25C TXC-05802-TM1 cub vc 150 SERVICE MANUAL focal cub 2
Contextual Info: ^ $ V \/IT C H ^ Technical Manual CellBus Bus - TABLE OF CONTENTS PAGE 1. Introduction 1.1 1.2 5 CellBus Bus Overview 6 CUBIT-Pro Overview 7 1.2.1 CUB IT-Pro Cell-Incoming Side Operation

PAC470R4GQ

Contextual Info: PACR4G CALIFORNIA MICRO DEVICES P/Active High Performance Bus Termination Network Features Applications • Designed especially for High Performance computers/servers • High Performance servers • Provides high speed bus termination • GTL, NTL, ECL terminator

5555 FAIRCHILD optocoupler

Abstract: MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N
Contextual Info: R E L I A B L E . L O G I C . I N N O V A T I O N . Logic Cross-Reference Logic Cross-Reference 2003 Texas Instruments Printed in the U.S.A. by Texoma Business Forms, Durant, Oklahoma Printed on recycled paper. SCYB017A NEW First Revision Logic Cross-Reference

Contextual Info: 74GTL16616 17-BIT LVTTL-TO-GTL/GTL+ UNIVERSAL BUS TRANSCEIVER WITH BUFFERED CLOCK OUTPUTS www.ti.com SCBS481H – JUNE 1994 – REVISED APRIL 2005 FEATURES • • • • • • • • • • • • DGG OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus

MAX3234

Abstract: maxim dallas 2501 jtag gd75232 DALLAS 2501 jtag PL-2303 LGA 775 SOCKET PIN LAYOUT SN75176 PL-2303 SN75179 application MAX490 schematic
Contextual Info: R E A L W O R L D S I G N A L P TM R O C E S S I N G Interface Selection Guide 2Q 2004 Table of Contents Introduction .3 Data Line Circuits High-Speed Interconnect LVDS, xECL, CML .4

Contextual Info: Technical Manual CellBus Bus " OF CONTENTS PAGE 1. Introduction 5 1.1 CellBus Bus Overview 6 1.2 CUBIT-Pro Overview 7 1.2.1 CUBIT-Pro Cell-Incoming Side Operation 1.2.2 Bus Arbiter 1.2.3 CUBIT-/3ro Cell-Outgoing Side Operation

A115-A

Abstract: C101 SN74GTL16923 SN74GTL16923DGGR
Contextual Info: www.ti.com FEATURES • • • • • • • • • • Member of the Texas Instruments Widebus Family OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference D-Type Flip-Flops With Qualified Storage Enable Translates Between GTL/GTL+ Signal Levels

p6207

Abstract: PAC470R6GQ PAC500R6GQ PAC560R6GQ TDS820
Contextual Info: PACR6G CALIFORNIA MICRO DEVICES P/Active High Performance Bus Termination Network Features Applications • Highly integrated bus termination network • Pentium ® Pro servers & desktop systems • 1% absolute tolerance terminations • Engineering workstations

GTL16612

Abstract: SN54GTL16612 SN74GTL16612 SN74GTL16612DGGR SN74GTL16612DL SN74GTL16612DLR SNJ54GTL16612WD
Contextual Info: SN54GTL16612, 74GTL16612 18-BIT LVTTL-TO-GTL/GTL+ UNIVERSAL BUS TRANSCEIVERS www.ti.com FEATURES • • • • • • • • • • Members of Texas Instruments Widebus Family UBT™ Transceivers Combine D-Type Latches and D-Type Flip-Flops for Operation in

A115-A

Abstract: C101 SN74GTL16923 SN74GTL16923DGGR
Contextual Info: www.ti.com FEATURES • • • • • • • • • • Member of the Texas Instruments Widebus Family OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference D-Type Flip-Flops With Qualified Storage Enable Translates Between GTL/GTL+ Signal Levels

Contextual Info: www.ti.com 74GTL16622A 18-BIT LVTTL-TO-GTL/GTL+ BUS TRANSCEIVER SCBS673F – AUGUST 1996 – REVISED APRIL 2005 FEATURES • • • • • • • • • • Member of Texas Instruments Widebus Family OEC™ Circuitry Improves Signal Integrity and

Contextual Info: SN54GTL16612, 74GTL16612 18-BIT LVTTL-TO-GTL/GTL+ UNIVERSAL BUS TRANSCEIVERS www.ti.com FEATURES • • • • • • • • • • Members of Texas Instruments Widebus Family UBT™ Transceivers Combine D-Type Latches and D-Type Flip-Flops for Operation in

Contextual Info: www.ti.com FEATURES • • • • • • • • • • Member of the Texas Instruments Widebus Family OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference D-Type Flip-Flops With Qualified Storage Enable Translates Between GTL/GTL+ Signal Levels

Contextual Info: www.ti.com FEATURES • • • • • • • • • • Member of the Texas Instruments Widebus Family OEC™ Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference D-Type Flip-Flops With Qualified Storage Enable Translates Between GTL/GTL+ Signal Levels

Contextual Info: 74GTL16616 17-BIT LVTTL-TO-GTL/GTL+ UNIVERSAL BUS TRANSCEIVER WITH BUFFERED CLOCK OUTPUTS www.ti.com SCBS481H – JUNE 1994 – REVISED APRIL 2005 FEATURES • • • • • • • • • • • • DGG OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus

GTL16612

Abstract: JESD22-A114 JESD22-A115 JESD78
Contextual Info: INTEGRATED CIRCUITS GTL16612 18-bit GTL/GTL+ to LVTTL/TTL bidirectional latched translator 3-State Product specification Philips Semiconductors 1999 Sep 13 Philips Semiconductors Product specification 18-bit GTL/GTL+ to LVTTL/TTL bidirectional latched translator (3-State)