74BBB03 Search Results
74BBB03 Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
|---|---|---|---|
P 32240Contextual Info: QSFCT3240, 3244, 32240, 32244 PRELIMINARY 3.3 Volt CMOS 8-BÌt Q QS74FCT3240 QS74FCT3244 Buffers/Line Drivers JgÏ Ï S S J Î FEATURES/BENEFITS • • • • • Pin and function compatible to the 74F240/4 74LVT240/4 and 74FCT240T/4T Available in SOIC and QSOP |
OCR Scan |
qsfct3240qs74fct3240qs74fct324474f240/4+7 | |
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Contextual Info: QS723620 Ô High-Speed CMOS 1 K X 3 6 Clocked FIFO with Bus Sizing QS723620 FEATURES • Fast cycle times: 20/25/30 ns • Selectable 36/18/9-bit word width for both input port and output port • Byte-order-reversal function i.e., “big-endian” o “little-endian” conversion |
OCR Scan |
qs72362036/18/9-bit16-ma-lol132-pin+3 | |
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Contextual Info: QSFCT139T, 239T Q High Speed CMOS Dual Binary 1-of-4 Decoders qss4/74fcti39t qs54/74fct239t FEATURES/BENEFITS • QSFCT139D with 4.0 ns propagation delay • I o l = 48 mA COM, 32 mA MIL • TTL-compatible input and output levels • Mil product compliant with MIL-STD 883, Class B |
OCR Scan |
qsfct139tqss4/74fcti39qs54/74fct239+4 | |
S3L384Q
Abstract: S3L384 QS3L384 QS3L2384
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OCR Scan |
74bb003qs3l384qs3l2384cmos10-bit+5 | |
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Contextual Info: QS72211, QS72221 ADVANCE INFORMATION Q High-Speed CMOS 512X 9, 1K X 9 QS72221 Parallel Clocked FIFO FEATURES • • • • 15-ns 66 MHz read/write cycle times Synchronous/asynchronous read and write TTL compatible input and output levels Low power with industry-standard pinouts |
OCR Scan |
qs72211qs7222115-ns32-pin+2 | |
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Contextual Info: QS74FCT16245T, QS74FCT162245T ADVANCE INFORMATION Q High Speed CMOS 16-Bit Bidirectional Transceivers QS74FCT16245T QS74FCT162245T FEATURES/BENEFITS • Pin and function compatible with T.l. Widebus and IDT Double-Density™ families • CMOS power levels: <1 jiW typical standby |
OCR Scan |
qs74fct16245tqs74fct162245t16-bitfct16245t+1 | |
D3254Contextual Info: QS7024A PRELIMINARY High-Speed CMOS 4K x 16 Asynchronous Dual-Port RAM Q FEATURES QS7024A DESCRIPTION High-speed asynchronous dual-port architecture Access times from either port, 20/25/35/55 ns Industry standard pin-out Independent port access and control |
OCR Scan |
qs7024a100-pin84-pin64kbit+3 | |
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Contextual Info: ÛUALITY SEM ICO NDUCTOR INC bSE D QS7201, • 74bbûG3 DG01Q30 bfl3 ■ Û S I QS7202 High Speed CMOS 9-bït FIFO Buffer Memories 512x9: QS7201 1Kx9: QS7202 FEATURES/BENEFITS • 12 ns flag and data access times • Fully Asynchronous Read and Write • Zero fall-through time |
OCR Scan |
qs7201dg01q30qs7202512x9+2 | |
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Contextual Info: QS72231, QS72241 ADVANCE INFORMATION Q High-Speed CMOS 2K x 9, 4K x 9 Parallel Clocked FIFO QS72231 QS72241 FEATURES • • • • 15-ns 66-MHz read/write cycle times Synchronous/asynchronous read and write TTL input and output level compatible Low power with industry-standard pinouts |
OCR Scan |
qs72231qs7224115-ns66-mhz+2 | |
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Contextual Info: QS74FCT16374T, QS74FCT162374T ADVANCE INFORMATION Q High Speed CMOS 16-Bit Registers 3-State QS74FCT16374T qs74fcti623?4t FEATURES/BENEFITS Pin and function compatible with T.l. Widebus and IDT Double-Density™ families CMOS power levels: <1 nW typical standby |
OCR Scan |
qs74fct16374tqs74fct162374t16-bitfct16374t+3 | |
Mbbfl03
Abstract: DDD1141
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OCR Scan |
qs72231qs7224115-ns66-mhz+4 | |
FCT16245
Abstract: QS74FCT16245T
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OCR Scan |
qs74fct16245tqs74fct162245t16-bitfct16245t+4 | |
QS316245
Abstract: FCT16245 A2B3
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OCR Scan |
qs31624516-bitfct1624548-pin+2 | |
2843B
Abstract: 74fct2841 28458 2845B 845T MO-072AC 2841B 843T 072AC M0-072AD
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OCR Scan |
qsfct841t2841t2843t2845t+16 | |
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2sa 1023Contextual Info: QS723611, QS723621 PRELIMINARY Q High-Speed CMOS 5 1 2 X 3 6 X 2 /1 K X 3 6 X 2 Bi-directional FIFO DESCRIPTION FEATURES/BENEFITS Fast cycle times: 20/25/30/35 ns 50/40/33/28 MHz Functionally Upwards-Compatible with QS725420A Two 512 x 36-bit (QS723611) or 1K x 36-bit |
OCR Scan |
qs723611qs723621qs725420a36-bit+1 | |
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Contextual Info: QS7026A, QS70261A PRELIMINARY High-Speed CMOS 16K x 16 Asynchronous Dual-Port RAM Ô QS7026A QS70261A FEATURES/BENEFITS • High-speed asynchronous dual-port architecture • Independent port access and control • Access times from either port, 25/35/45/55 ns |
OCR Scan |
qs7026aqs70261a100-pin84-pin | |
QD03-2Contextual Info: QS7201, QS7202 Ultra-High-Speed CMOS 5 1 2 x 9 , 1K x 9 FIFO Buffer Memories Q QS7201 QS7202 DESCRIPTION FEATURES Ultra-fast 10-ns flag and data access times Ground-bounce controlled outputs 66-MHz cycle times Input noise filters on read/write lines Fully asynchronous read and write |
OCR Scan |
qs7201qs720210-ns66-mhz+2 | |
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Contextual Info: QS4A205Q PRELIMINARY Q High-Performance CMOS Analog 4-Bit 2:1 Mux/Demux FEATURES Low on-resistance: rDS on = 5ft Fast transition time: ttRAN = 6 ns Wide bandwidth: 830 MHz (-3 dB point) Crosstalk: -115 dB @ 50 KHz, -66dB @ 30 MHz Off-isolation: -9 0 dB @ 50 KHz, -50 dB @ 30 MHz, |
OCR Scan |
qs4a205q-66dbmdsa-00005-00 | |
25C1
Abstract: 74F245 74FCT245T 74LVT245 QS74FCT2X3245 QS74FCT3245 FCT3245
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OCR Scan |
qsfct3245qs74fct3245qs74fct3224574f245+7 | |