74AUP2G32DC Search Results

Contextual Info: 74AUP2G32 Low-power dual 2-input OR gate Rev. 6 — 5 June 2012 Product data sheet 1. General description The 74AUP2G32 provides dual 2-input OR function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.

Contextual Info: 74AUP2G32 Low-power dual 2-input OR gate Rev. 6 — 5 June 2012 Product data sheet 1. General description The 74AUP2G32 provides dual 2-input OR function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.

74AUP2G32

Abstract: 74AUP2G32DC
Contextual Info: 74AUP2G32 Low-power dual 2-input OR gate Rev. 4 — 21 October 2010 Product data sheet 1. General description The 74AUP2G32 provides dual 2-input OR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.

74AUP2G32

Abstract: 74AUP2G32DC 74AUP2G32GM MO-187
Contextual Info: 74AUP2G32 Low-power dual 2-input OR gate Rev. 02 — 28 February 2008 Product data sheet 1. General description The 74AUP2G32 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall

Contextual Info: 74AUP2G32 Low-power dual 2-input OR gate Rev. 5 — 6 December 2011 Product data sheet 1. General description The 74AUP2G32 provides dual 2-input OR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.

74AUP2G32

Abstract: 74AUP2G32DC 74AUP2G32GM JESD22-A114E
Contextual Info: 74AUP2G32 Low-power dual 2-input OR gate Rev. 03 — 8 January 2009 Product data sheet 1. General description The 74AUP2G32 provides the dual 2-input OR function. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall

Contextual Info: 74AUP2G32 Low-power dual 2-input OR gate Rev. 7 — 23 January 2013 Product data sheet 1. General description The 74AUP2G32 provides dual 2-input OR function. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.

Contextual Info: 74AUP2G32 Low-power dual 2-input OR gate Rev. 01 — 6 October 2006 Product data sheet 1. General description The 74AUP2G32 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall

NC7WP32L8X

Abstract: SLG74LB2G32 74LVC2G32 74AUP2G32 NC7WP32 NC7WZ32 NL27WZ32 SN74AUC2G32 SN74AUP2G32 SN74LVC2G32
Contextual Info: SLG74LB2G32 GreenLIBTM DUAL 2-INPUT OR GATE General Description The GreenLIB provides the dual 2-input OR function. This device ensures a very low static and dynamic power consumption. Output Summary • Features • Pb-Free / RoHS Compliant • Halogen-Free