74AUP2G240DC Search Results

74AUP2G240DC Result Highlights (1)

Part	ECAD Model	Manufacturer	Description	Download	Buy
SN74AUP2G240DCUR		Texas Instruments	Low-Power Dual Buffer/Driver With 3-State Outputs 8-VSSOP -40 to 85

74AUP2G240DC Datasheets (4)

Part	ECAD Model	Manufacturer	Description	Datasheet Type	PDF	PDF Size	Page count
74AUP2G240DC		NXP Semiconductors	Low-power dual inverting buffer/line driver; 3-state	Original	PDF	100.85KB	20
74AUP2G240DC		NXP Semiconductors	74AUP2G240 - IC AUP/ULP/V SERIES, DUAL 1-BIT DRIVER, INVERTED OUTPUT, PDSO8, 2.30 MM, PLASTIC, MO-187, SOT765-1, VSSOP-8, Bus Driver/Transceiver	Original	PDF	304.48KB	25
74AUP2G240DC,125		NXP Semiconductors	Low-power dual inverting buffer/line driver; 3-state; Package: SOT765-1 (VSSOP8); Container: Reel Pack, Reverse, Reverse	Original	PDF	100.85KB	20
74AUP2G240DC,125		NXP Semiconductors	74AUP2G240 - IC AUP/ULP/V SERIES, DUAL 1-BIT DRIVER, INVERTED OUTPUT, PDSO8, 2.30 MM, PLASTIC, MO-187, SOT765-1, VSSOP-8, Bus Driver/Transceiver	Original	PDF	304.48KB	25

74AUP2G240DC Price and Stock

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Texas Instruments SN74AUP2G240DCUR Buffers & Line Drivers Low-Power Dual Buffe r/Driver
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Mouser Electronics	SN74AUP2G240DCUR		5,280			1 $0.43 10 $0.30 100 $0.23 1000 $0.20 10000 $0.18	Buy Now
Nexperia 74AUP2G240DC,125 Buffers & Line Drivers SOT765-1 DUAL INVRT BFFR/DRVR
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Mouser Electronics	74AUP2G240DC,125					1 $0.92 10 $0.55 100 $0.35 1000 $0.23 10000 $0.16	Get Quote
Verical	74AUP2G240DC,125		15,688		2,052	1 - 10 - 100 - 1000 - 10000 $0.16	Buy Now
TTI	74AUP2G240DC,125	Reel			3,000	1 - 10 - 100 - 1000 - 10000 $0.14	Buy Now

74AUP2G240DC Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
74AUP2G240 Abstract: 74AUP2G240DC 74AUP2G240GT JESD22-A114E JESD78 Contextual Info: 74AUP2G240 Low-power dual inverting buffer/line driver; 3-state Rev. 03 — 7 April 2009 Product data sheet 1. General description The 74AUP2G240 provides the dual inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input nOE . A HIGH level at pin nOE	Original	74AUP2G240 74AUP2G240 74AUP2G240DC 74AUP2G240GT JESD22-A114E JESD78	PDF
74AUP2G240 Abstract: 74AUP2G240DC 74AUP2G240GT JESD22-A114E JESD78 Contextual Info: 74AUP2G240 Low-power dual inverting buffer/line driver; 3-state Rev. 04 — 30 June 2009 Product data sheet 1. General description The 74AUP2G240 provides the dual inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input nOE . A HIGH level at pin nOE	Original	74AUP2G240 74AUP2G240 74AUP2G240DC 74AUP2G240GT JESD22-A114E JESD78	PDF
Contextual Info: 74AUP2G240 Low-power dual inverting buffer/line driver; 3-state Rev. 01 — 6 October 2006 Product data sheet 1. General description The 74AUP2G240 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.	Original	74AUP2G240 74AUP2G240 The18	PDF
74AUP2G240 Abstract: 74AUP2G240DC 74AUP2G240GT JESD78 Contextual Info: 74AUP2G240 Low-power dual inverting buffer/line driver; 3-state Rev. 5 — 13 September 2010 Product data sheet 1. General description The 74AUP2G240 provides the dual inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input nOE . A HIGH level at pin nOE	Original	74AUP2G240 74AUP2G240 74AUP2G240DC 74AUP2G240GT JESD78	PDF
Contextual Info: 74AUP2G240 Low-power dual inverting buffer/line driver; 3-state Rev. 8 — 24 January 2013 Product data sheet 1. General description The 74AUP2G240 provides the dual inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input nOE . A HIGH level at pin nOE	Original	74AUP2G240 74AUP2G240	PDF
Contextual Info: 74AUP2G240 Low-power dual inverting buffer/line driver; 3-state Rev. 7 — 6 June 2012 Product data sheet 1. General description The 74AUP2G240 provides the dual inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input nOE . A HIGH level at pin nOE	Original	74AUP2G240 74AUP2G240	PDF
Contextual Info: 74AUP2G240 Low-power dual inverting buffer/line driver; 3-state Rev. 6 — 5 December 2011 Product data sheet 1. General description The 74AUP2G240 provides the dual inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input nOE . A HIGH level at pin nOE	Original	74AUP2G240 74AUP2G240	PDF
74AUP2G240 Abstract: 74AUP2G240DC 74AUP2G240GM 74AUP2G240GT JESD22-A114D JESD78 Contextual Info: 74AUP2G240 Low-power dual inverting buffer/line driver; 3-state Rev. 02 — 22 February 2008 Product data sheet 1. General description The 74AUP2G240 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS-compatible TTL families.	Original	74AUP2G240 74AUP2G240 74AUP2G240DC 74AUP2G240GM 74AUP2G240GT JESD22-A114D JESD78	PDF
NC7WZ240K8X Abstract: 74AUP2G240 74LVC2G240 NC7WZ240 SN74AUC2G240 SN74AUP2G240 SN74LVC2G240 Silego Technology dual inverting schmitt-trigger Contextual Info: SLG74LB2G240 GreenLIBTM DUAL INVERTING BUFFER/DRIVER WITH TRI-STATE OUTPUTS General Description Features The GreenLIB provides the dual inverting buffer/driver with • Pb-Free / RoHS Compliant tri-state outputs. The tri-state outputs are controlled by •	Original	SLG74LB2G240 000-0074LB2G240-11 NC7WZ240K8X 74AUP2G240 74LVC2G240 NC7WZ240 SN74AUC2G240 SN74AUP2G240 SN74LVC2G240 Silego Technology dual inverting schmitt-trigger	PDF
Contextual Info: 74AUP2G240 Low-power dual inverting buffer/line driver; 3-state Rev. 7 — 6 June 2012 Product data sheet 1. General description The 74AUP2G240 provides the dual inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input nOE . A HIGH level at pin nOE	Original	74AUP2G240 74AUP2G240	PDF