74AUP2G07GW Search Results

Contextual Info: 74AUP2G07 Low-power dual buffer with open-drain output Rev. 6 — 2 December 2011 Product data sheet 1. General description The 74AUP2G07 provides two non-inverting buffers with open-drain output. The output of the device is an open drain and can be connected to other open-drain outputs to

Contextual Info: 74AUP2G07 Low-power dual buffer with open-drain output Rev. 7 — 29 November 2012 Product data sheet 1. General description The 74AUP2G07 provides two non-inverting buffers with open-drain output. The output of the device is an open drain and can be connected to other open-drain outputs to

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Contextual Info: QUICK INDEX NEW IN THIS ISSUE! Detailed Index - See Pages 3-24 Digital Signal Processors, iCoupler , iMEMS® and iSensor . . . . . 805, 2707, 2768-2769 Connectors, Cable Assemblies, IC Sockets . . . . . . . . . . . 28-568 RF Connectors . . . . . . . . . . . . . . . . . . . . . . Pages 454-455

Contextual Info: 74AUP2G07 Low-power dual buffer with open-drain output Rev. 01.00 — 16 January 2006 Preliminary data sheet 1. General description The 74AUP2G07 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.

74AUP2G07

Abstract: 74AUP2G07GF 74AUP2G07GM 74AUP2G07GW JESD22-A114E
Contextual Info: 74AUP2G07 Low-power dual buffer with open-drain output Rev. 02 — 12 June 2007 Product data sheet 1. General description The 74AUP2G07 provides two non-inverting buffers with open-drain output. The output of the device is an open drain and can be connected to other open-drain outputs to

74AUP2G07

Abstract: 74AUP2G07GF 74AUP2G07GM 74AUP2G07GW
Contextual Info: 74AUP2G07 Low-power dual buffer with open-drain output Rev. 5 — 9 September 2010 Product data sheet 1. General description The 74AUP2G07 provides two non-inverting buffers with open-drain output. The output of the device is an open drain and can be connected to other open-drain outputs to

Contextual Info: 74AUP2G07 Low-power dual buffer with open-drain output Rev. 01 — 21 November 2006 Product data sheet 1. General description The 74AUP2G07 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.

74AUP2G07GF

Abstract: 74AUP2G07 74AUP2G07GM 74AUP2G07GW JESD22-A114E
Contextual Info: 74AUP2G07 Low-power dual buffer with open-drain output Rev. 04 — 11 June 2009 Product data sheet 1. General description The 74AUP2G07 provides two non-inverting buffers with open-drain output. The output of the device is an open drain and can be connected to other open-drain outputs to

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Contextual Info: QUICK INDEX NEW IN THIS ISSUE! Detailed Index - See Pages 3-24 AD9272 Analog Front End, iMEMS Accelerometers & Gyroscopes . . . . . . 782, 2583 Connectors, Cable Assemblies, IC Sockets . . . . . . . . . . . 28-528 Acceleration and Pressure Sensors . . . . . . . . . . . . . . . . . . . . . . . . . . Page 2585

74AUP2G07

Abstract: 74AUP2G07GF 74AUP2G07GM 74AUP2G07GW JESD22-A114E
Contextual Info: 74AUP2G07 Low-power dual buffer with open-drain output Rev. 03 — 16 October 2007 Product data sheet 1. General description The 74AUP2G07 provides two non-inverting buffers with open-drain output. The output of the device is an open drain and can be connected to other open-drain outputs to