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    74AUP2G04GF Search Results

    74AUP2G04GF Datasheets (5)

    Part ECAD Model Manufacturer Description Datasheet Type PDF PDF Size Page count
    74AUP2G04GF
    NXP Semiconductors Low-power dual inverter Original PDF 76.27KB 16
    74AUP2G04GF
    NXP Semiconductors 74AUP2G04 - IC AUP/ULP/V SERIES, DUAL 1-INPUT INVERT GATE, PDSO6, 1 X 1 MM, 0.50 MM HEIGHT, PLASTIC, SOT-891, SON-6, Gate Original PDF 200.74KB 19
    74AUP2G04GF
    Philips Semiconductors Low-power dual inverter Original PDF 65.87KB 18
    74AUP2G04GF,132
    NXP Semiconductors Low-power dual inverter; Package: SOT891 (XSON6); Container: Tape reel smd Original PDF 76.27KB 16
    74AUP2G04GF,132
    NXP Semiconductors 74AUP2G04 - IC AUP/ULP/V SERIES, DUAL 1-INPUT INVERT GATE, PDSO6, 1 X 1 MM, 0.50 MM HEIGHT, PLASTIC, SOT-891, XSON-6, Gate Original PDF 200.74KB 19
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    74AUP2G04GF Price and Stock

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    Nexperia 74AUP2G04GF,132

    IC INVERTER 2CH 2-INP 6XSON
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    DigiKey () 74AUP2G04GF,132 Cut Tape
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    Verical () 74AUP2G04GF,132 98,000 1,731
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    74AUP2G04GF,132 85,000 1,731
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    Rochester Electronics 74AUP2G04GF,132 183,000 1
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    Avnet Silica 74AUP2G04GF,132 54 Weeks 5,000
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    Rochester Electronics LLC 74AUP2G04GF,132

    IC INVERTER
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    DigiKey 74AUP2G04GF,132 Bulk 1,381
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    NXP Semiconductors 74AUP2G04GF,132

    Inverter 2-Element CMOS 6-Pin XSON T/R
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    Verical () 74AUP2G04GF,132 85,000 1,731
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    74AUP2G04GF,132 5,000 1,731
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    74AUP2G04GF,132 5,000 1,731
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    Rochester Electronics 74AUP2G04GF,132 95,300 1
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    74AUP2G04GF Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    74AUP2G04

    Abstract: 74AUP2G04GF 74AUP2G04GM 74AUP2G04GW JESD22-A114D
    Contextual Info: 74AUP2G04 Low-power dual inverter Rev. 01 — 22 November 2006 Product data sheet 1. General description The 74AUP2G04 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall


    Original
    74AUP2G04 74AUP2G04 74AUP2G04GF 74AUP2G04GM 74AUP2G04GW JESD22-A114D PDF

    74AUP2G04GF

    Abstract: 74AUP2G04GM 74AUP2G04GW JESD22-A114E 74AUP2G04
    Contextual Info: 74AUP2G04 Low-power dual inverter Rev. 02 — 7 July 2009 Product data sheet 1. General description The 74AUP2G04 provides two inverting buffers. Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.


    Original
    74AUP2G04 74AUP2G04 74AUP2G04GF 74AUP2G04GM 74AUP2G04GW JESD22-A114E PDF

    Contextual Info: 74AUP2G04 Low-power dual inverter Rev. 5 — 5 March 2012 Product data sheet 1. General description The 74AUP2G04 provides two inverting buffers. Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.


    Original
    74AUP2G04 74AUP2G04 PDF

    74AUP2G04

    Abstract: 74AUP2G04GF 74AUP2G04GM 74AUP2G04GW JESD22-A114-C
    Contextual Info: 74AUP2G04 Low-power dual inverter Rev. 01. — 16 January 2006 Preliminary data sheet 1. General description The 74AUP2G04 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall


    Original
    74AUP2G04 74AUP2G04 74AUP2G04GF 74AUP2G04GM 74AUP2G04GW JESD22-A114-C PDF

    74AUP2G04

    Abstract: 74AUP2G04GF 74AUP2G04GM 74AUP2G04GW
    Contextual Info: 74AUP2G04 Low-power dual inverter Rev. 3 — 1 November 2010 Product data sheet 1. General description The 74AUP2G04 provides two inverting buffers. Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.


    Original
    74AUP2G04 74AUP2G04 74AUP2G04GF 74AUP2G04GM 74AUP2G04GW PDF

    Contextual Info: 74AUP2G04 Low-power dual inverter Rev. 4 — 2 December 2011 Product data sheet 1. General description The 74AUP2G04 provides two inverting buffers. Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.


    Original
    74AUP2G04 74AUP2G04 PDF