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    74AUP1G80GW Search Results

    74AUP1G80GW Datasheets (4)

    Part ECAD Model Manufacturer Description Datasheet Type PDF PDF Size Page count
    74AUP1G80GW
    		NXP Semiconductors Low-power D-type flip-flop; positive-edge trigger Original PDF 88.98KB 18
    74AUP1G80GW
    		NXP Semiconductors 74AUP1G80 - IC AUP/ULP/V SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, INVERTED OUTPUT, PDSO5, 1.25 MM, PLASTIC, MO-203, SC-88A, SOT-353-1, TSSOP-5, FF/Latch Original PDF 371.9KB 22
    74AUP1G80GW,125
    		NXP Semiconductors Low-power D-type flip-flop; positive-edge trigger; Package: SOT353-1 (TSSOP5); Container: Reel Pack, Reverse, Reverse Original PDF 88.98KB 18
    74AUP1G80GW,125
    		NXP Semiconductors 74AUP1G80 - IC AUP/ULP/V SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, INVERTED OUTPUT, PDSO5, 1.25 MM, PLASTIC, MO-203, SC-88A, SOT-353-1, TSSOP-5, FF/Latch Original PDF 371.9KB 22
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    74AUP1G80GW Price and Stock

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    Nexperia 74AUP1G80GW,125

    IC FF D-TYPE SINGLE 1BIT 5TSSOP
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    DigiKey () 74AUP1G80GW,125 Cut Tape 3,731 1
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    74AUP1G80GW,125 Digi-Reel 3,731 1
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    74AUP1G80GW,125 Reel 3,000 3,000
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    Avnet Americas 74AUP1G80GW,125 Reel 8 Weeks 12,000
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    Mouser Electronics 74AUP1G80GW,125 452
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    Verical () 74AUP1G80GW,125 6,000 2,215
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    74AUP1G80GW,125 3,000 2,215
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    Newark 74AUP1G80GW,125 Cut Tape 65 5
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    Rochester Electronics 74AUP1G80GW,125 10,940 1
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    Avnet Asia 74AUP1G80GW,125 8 Weeks 12,000
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    NXP Semiconductors 74AUP1G80GW,125

    Flip Flop D-Type Pos-Edge 1-Element 5-Pin TSSOP T/R
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    Verical () 74AUP1G80GW,125 223,117 2,215
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    74AUP1G80GW,125 114,000 2,215
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    74AUP1G80GW,125 111,000 2,215
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    74AUP1G80GW,125 6,000 2,215
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    Rochester Electronics 74AUP1G80GW,125 454,117 1
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    74AUP1G80GW Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    74AUP1G80

    Abstract: 74AUP1G80GF 74AUP1G80GM 74AUP1G80GW MO-203
    Contextual Info: 74AUP1G80 Low-power D-type flip-flop; positive-edge trigger Rev. 01 — 20 October 2006 Product data sheet 1. General description The 74AUP1G80 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.


    Original     		74AUP1G80 74AUP1G80 74AUP1G80GF 74AUP1G80GM 74AUP1G80GW MO-203 PDF

    Contextual Info: 74AUP1G80 Low-power D-type flip-flop; positive-edge trigger Rev. 4 — 28 June 2012 Product data sheet 1. General description The 74AUP1G80 provides the single positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock


    Original     		74AUP1G80 74AUP1G80 PDF

    74AUP1G80

    Abstract: 74AUP1G80GF 74AUP1G80GM 74AUP1G80GW
    Contextual Info: 74AUP1G80 Low-power D-type flip-flop; positive-edge trigger Rev. 2 — 15 September 2010 Product data sheet 1. General description The 74AUP1G80 provides the single positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock


    Original     		74AUP1G80 74AUP1G80 74AUP1G80GF 74AUP1G80GM 74AUP1G80GW PDF

    Contextual Info: 74AUP1G80 Low-power D-type flip-flop; positive-edge trigger Rev. 3 — 29 November 2011 Product data sheet 1. General description The 74AUP1G80 provides the single positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock


    Original     		74AUP1G80 74AUP1G80 PDF