74ALS245AD Search Results

TEXTOOL SOCKET DIP16

Abstract: 74ALS245AN 74ALS245AD Signetics MS-012-AB 74ALS 74ALS245A 74ALS245A-1 74ALS245AD 74ALS245 signetics 74ALS245A
Contextual Info: Signetics 74ALS245A, 74ALS245A-1 T ra n s c e iv e rs Octal Transceivers 3-State ALS Products Product Specification FEATURES TYPE • Octal bidirectional bus interface • 3-state buffer outputs sink 24mA and source 15mA. • Outputs are placed in high imped­

DT530

Abstract: 74ALS193D 74ALS573AD
Contextual Info: MITSUBISHI ÍDGTL LOGIC} TI D E I bEMTflE? .0012450 S I M ITSUBISHI ALSTTLS 6249827 MITSUBISHI M 7 4 A L S 2 4 0 A P 91D 12458 D CDGTL LOGIC OCTAL B U FFER/LIN E D R IVE R W IT H 3-STATE O U TPUT IN V E R T E D ) 7 ^ 5 5 - 0 DESCRIPTION The M74ALS240AP is a semiconductor Integrated circuit

Contextual Info: MITSUBISHI ALSTTLs M 7 4 A LS 6 5 2 P p W 'T ^ S '^ - 3 / 50"‘ OCTAL BUS TRANSCEIVER/REGISTER W ITH 3-STATE OUTPUT NONINVERTED N °"c< 6249827 MITSUBISHI ÍDGTL DESCRIPTION The M74ALS652P is a semiconductor Integrated circuit consisting of eight bus transceiver/registers with 3-state

74ALS245AN

Abstract: 74ALS 74ALS245A 74ALS245A-1 74ALS245AD
Contextual Info: 7 4 A L S 2 4 5 A , 7 4 A L S 2 4 5 A -1 Transceivers Octal Transceivers 3-State Product Specification FEATURES • Octal bidirectional bus interface • 3-state buffer outputs sink 24mA and source 15mA. • Outputs are placed in high imped­ ance state during power-off

LS32P

Abstract: M74ALS32P M74ALS1032
Contextual Info: "d ËJ. tSMTflS? 0Q123t,l 1 MITSUBISHI -CDGTL LOGIC} =11 MITSUBISHI ALSTTLs M 74A LS 32P 24® ^ 2 7 1 ^ I T S Ï Ï B î s T u n r M T r T Ô G Ï ^ 91° 12361 D QUADRUPLE 2 -IN P U T P O S IT IV E OR GATE r-V3-/5* DESCRIPTION Th e M 7 4 A L S 3 2 P is a s e m ic o n d u c to r in teg rated circu it

74ALS577

Contextual Info: ’T ^ f& 'O ÿ 'û f MITSUBISHI ALSTTLs M 74ALS577AP OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOP W ITH 3 -STATE OUTPUT AND SYNCHRONOUS RESET INVERTED 6249827 MITSUBISHI CDGTL LOGIC) DESCRIPTION 9 1D 12607 PIN CONFIGURATION (TOP VIEW) The M74ALS577AP is a semiconductor integrated circuit

74ALS560

Abstract: 20P4 T1143
Contextual Info: T É MITSUBISHI íDGTL LOGIC} TI b S M T Ö S ? G G G i a S b S • MITSUBISHI ALSTTLs M 74ALS560AP 6249827 MITSUBISHI CDGTL LOGIC) 91D 12562 D SYNCHRONOUS PR ESETTA B LE DECADE COUNTER W IT H 3 -S T A T E O U TPU T DESCRIPTION PIN CONFIGURATION TOP VIEW)

Contextual Info: MITSUBISHI ALSTTLs M 74A LS1243A P MITSUBISHI iDGTL LOGIC} TI D E | bS4iaa7 DD 15743 4 | Q UADRUPLE BUS TR A N S C E IVE R W IT H 3-STATE O UTPUT N O N IN VER TED /- DESCRIPTION The M74ALS1243AP is a semiconductor integrated circuit consisting of four bus transmitter/receiver circuits with

Contextual Info: •7~^4/5 '-£ 3 -C ft MITSUBISHI ALSTTLs M 74A LS 569A P SYNCHRONOUS PRESETTABLE UP/DOW N 4 -B IT BINARY COUNTER W ITH 3-STATE OUTPUT 6 2 4 9 8 2 7 MITSU B I S H I DESCRIPTION 12587 D PIN CONFIGURATION TOP VIEW Thé M74ALS569AP is a semiconductor integrated circuit

M74ALS00AP

Contextual Info: MITSUBISHI -CDGTL L O G I O D E I =11 b E M T B B V □ □ 1 2 3 2 7 1 | MITSUBISHI ALSTTLs M 74A LS00A P 6249827 MITSUBISHI ÖDGTL LOGIC 91D 12327 D QUADRUPLE 2-IN P U T POSITIVE NAND GATE 7 = y j - / r DESCRIPTION T h e M 7 4A L S 00A P is a sem ic o n d u c to r in teg rated circu it

M74ALS10AP

Contextual Info: MITSUBISHI ÍDGTL LOGIC} TI D E I b E M T f lE ? 0 0 1 2 3 4 1 t. I M IT S U B IS H F a LSTTL s M 74A LS10A P 6249827 MITSUBISHI {D G T L LOGIC 910 12341 D TRIPLE 3-IN P U T POSITIVE NAND GATE T-Y3-/S* PIN CONFIGURATION TOP VIEW) DESCRIPTION The M74ALS10AP is a semiconductor integrated circuit

74ALS161BD

Contextual Info: MITSUBISHI -CDGTL LOGIC} TI » e 1 i DGISLñS S 1 ~ t a M ' î û a ? MITSUBISHI ALSTTLs M 74A LS689P -TfcvS ,\<\c iOVCe .««6^ £249827 T -V S -/7 . iS '" '" ' 8 -B IT MAGNITUDE COMPARATOR W ITH OPEN COLLECTOR OUTPUT MITSUBISHI <DGTL 91D LOGIC DESCRIPTION

ci la 7610

Contextual Info: -c d g t l l o g ic } t i de ^ | bSMTñsv 91D 1 2 4 2 6 GDi^MEti D 3 M it s u b is h i a l s t t l s Ä _ M74ALS168BP A tjvy ' T - i ^ ' 9 ' 0 ' O ci SYNCHRONOUS PRESETTABLE U P/D O W N DECADE COUNTER D E S C R IP T IO N Th e M 74A L S 168 B P is a sem iconductor integrated circuit

LS08P

Abstract: M74ALS08P
Contextual Info: MI TS U B I S H I -CDGTL LOGIC! TI "DÈI 0012337 M rJuBi MITSUBISHI ALSTTLs M 74A LS08P 6249827 MITSUBISHI <D G T L LOGIC 91D 12337 D QUADRUPLE 2 -IN P U T P O S ITIV E AND GATE DESCRIPTION The M74ALS08P is a semiconductor Integrated circuit consisting of four 2-input positlve-logic AND gates,

74ALS157P

Contextual Info: MITSUBISHI -CDGTL LOGIC} TI □5t4ciñE7 ODISMOM 4 MITSUBISHI ALSTTLs O C 'i M 74A LS157P 6249827 MITSUBISHI (DGTL LOGI C 9 1 D 12404 QUADRUPLE 2-LIN E TO 1-LINE DATA SELECTOR/MULTIPLEXER T - 6 6 - 2 1 - 5 .1 DESCRIPTION PIN CONFIGURATION (TOP VIEW) The M 74ALS157P is a sem iconductor integrated circuit

74ALS245AN

Abstract: 744ALS245A-1D 74ALS245A 74ALS245A-1 74ALS245A-1N 74ALS245AD 74ALS245ADB
Contextual Info: INTEGRATED CIRCUITS 74ALS245A/74ALS245A–1 Octal transceiver 3–State Product specification IC05 Data Handbook Philips Semiconductors 1991 Jun 03 Philips Semiconductors Product specification Octal transceiver (3-State) 74ALS245A/74ALS245A-1 FEATURES PIN CONFIGURATION

74ALS245AN

Abstract: 74ALS 74ALS245A 74ALS245A-1 74ALS245AD 74ALS245ADB DIP20 philips amp 0050
Contextual Info: Philips Sem iconductors Product specification Octal transceiver 3-State 74ALS245A/74ALS245A-1 PIN CONFIGURATION FEATURES • Octal bidirectional bus interface 20] V qq T/R | T • 3-State buffer outputs sink 24m A and source 15mA 31 ÖE 3U B0 A0 U • Outputs are placed in high im pedance state during power-off

Contextual Info: M IT SU BISHI -CDGTL LOGIC} TI 6249827 MITSUBISHI » £ 1 bSMTñE? 0D1271D □ I MITSUBISHI ALSTTLs _ M 7 4 A L S 1 0 0 0 A P DGTL LOGIC 91D 12710 D QUADRUPLE 2 -IN P U T P O S IT IV E NAND BUFFER ' 7 Z' Y DESCRIPTION 3 '/ S ' PIN CONFIGURATION (TOP VIEW)

648P

Contextual Info: MITSUBISHI O G TL LOGIC} TI DËj| LE4TÖE7 0012LLL 1 ï “~ MITSUBISHI ALSTTLs P & M 7 4 A LS 6 4 8 P “ T-SÜ-3, • OCTAL BUS TRANSCEIVER/REGISTER W ITH 3-STATE OUTPUT INVERTED DESCRIPTION Th e M 74A LS 648P is a sem iconductor integrated circuit consisting of eight bus tran sceiver/reg is ters with 3-state

v533

Abstract: 74ALS161BP
Contextual Info: TlITSUBISHI iDGTL LOGIC} =11 ]>i| ^ 2 4 ^ 2 7 - 9 Td ' i 2 4 1 4 cx QD1E414 D M 7 MITSUBISHI ALSTTL s 7 4 A L S 1 6 I B P _tv'* I st- "’ SYNCHRONOUS PRESETTABLE 4 -B IT b in a r y c o u n t e r w i t h d ir e c t r e s e t DESCRIPTION The M 74A LS 161B P is a sem iconductor integrated circuit

Contextual Info: MITSUBISHI -CDGTL LOGIC} TI DE| tEMTflS? QOlHUbl MITSUBISHI ALSTTLs M 74ALS240A-1P *> *o o OCTAL BUFFER/LINE DRIVER W ITH 3-STATE OUTPUT INVERTED 6249327 MITSUBISHI CDGTL LOGIC) DESCRIPTION D 1 2 4 6 1 PIN CONFIGURATION (TOP VIEW) The M74ALS240A-1P is a semiconductor integrated cir­

LS1011A

Contextual Info: MITSUBISHI ALSTTLs M 74A LS1011A P D E_ I MITSUBISHI -CDGTL L0GICJ 0012724 0 | “ TRIPLE 3-IN P U T POSITIVE AND BUFFER 'T = '^ 3 - / S DESCRIPTION PIN CONFIGURATION TOP VIEW The M74ALS1011AP is a semiconductor Integrated cir­ cuit consisting of three 3-Input positive-logic AND buffer

Contextual Info: MITSUBISHI -CDGTL LOGIC} TI d e | b E 4TñE7 ooiassa a | MITSUBISHI ALSTTLs r . & M 74A LS 522P oec « < £ > ' ' 90 S»'" - r - v s '/ y 8-BIT MAGNITUDE COMPARATOR WITH OPEN COLLECTOR OUTPUT 8 2 4 9 82 7 MITSUBISHI {DGTL LOGIC DESCRIPTION The M74ALS522P is a semiconductor integrated circuit

Contextual Info: MITSUBISHI ALSTTLs M74ALS241A-1P *O V > 7 OCTAL BUFFER/LINE DRIVER W ITH 3-STATE OUTPUT NONINVERTED 9 1D 12467 6249827 MITSUBISHI (DGTL LOGIC) DESCRIPTION The M74ALS241A-1P is a sem iconductor integrated cir­ cu it con sisting o f tw o blocks o f buffers w ith 3-state