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74ACT11074DBRE4 Datasheets (3)

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Part	ECAD Model	Manufacturer	Description	Datasheet Type	PDF	PDF Size	Page count
74ACT11074DBRE4		Texas Instruments	Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and Preset	Original	PDF	347.01KB	10
74ACT11074DBRE4		Texas Instruments	Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and Preset 14-SSOP -40 to 85	Original	PDF	513.52KB	13
74ACT11074DBRE4		Texas Instruments	74ACT11074 - Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and Preset 14-SSOP -40 to 85	Original	PDF	903.18KB	14

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Texas Instruments 74ACT11074DBRE4 D Flip-Flop, ACT Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, CMOS, PDSO14
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Vyrian	74ACT11074DBRE4		5,503			1 - 10 - 100 - 1000 - 10000 -	Get Quote

74ACT11074DBRE4 Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
Contextual Info: 74ACT11074 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET SCAS498A – DECEMBER 1986 – REVISED APRIL 1996 D D D D D D, DB, OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise	Original	74act11074 scas498a 500-ma 300-mil	PDF
Contextual Info: 74ACT11074 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET SCAS498A – DECEMBER 1986 – REVISED APRIL 1996 D D D D D D, DB, OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise	Original	74act11074 scas498a 500-ma 300-mil +2msso002e mo-150	PDF
Contextual Info: 74ACT11074 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET SCAS498A – DECEMBER 1986 – REVISED APRIL 1996 D D D D D D, DB, OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise	Original	74act11074 scas498a 500-ma 300-mil	PDF
74ACT11074 Abstract: 74ACT11074D 74ACT11074DBLE 74ACT11074DBR 74ACT11074DBRE4 74ACT11074DBRG4 74ACT11074DE4 74ACT11074DG4 74ACT11074DR Contextual Info: 74ACT11074 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET SCAS498A – DECEMBER 1986 – REVISED APRIL 1996 D D D D D D, DB, OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise	Original	74act11074 scas498a 500-ma 300-mil +9mo-150 74act11074d 74act11074dble 74act11074dbr 74act11074dbre4 74act11074dbrg4 74act11074de4 74act11074dg4 74act11074dr	PDF
Contextual Info: 74ACT11074 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET SCAS498A – DECEMBER 1986 – REVISED APRIL 1996 D D D D D D, DB, OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise	Original	74act11074 scas498a 500-ma 300-mil	PDF
Contextual Info: 74ACT11074 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET SCAS498A – DECEMBER 1986 – REVISED APRIL 1996 D D D D D D, DB, OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise	Original	74act11074 scas498a 500-ma 300-mil +2msso002e mo-150	PDF
Contextual Info: 74ACT11074 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET SCAS498A – DECEMBER 1986 – REVISED APRIL 1996 D D D D D D, DB, OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise	Original	74act11074 scas498a 500-ma 300-mil	PDF
Contextual Info: 74ACT11074 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET SCAS498A – DECEMBER 1986 – REVISED APRIL 1996 D D D D D D, DB, OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise	Original	74act11074 scas498a 500-ma 300-mil +4scyd013 sdyu001x sgyc003d scyb017a	PDF
74ACT11074 Abstract: 74ACT11074D 74ACT11074DBLE 74ACT11074DBR 74ACT11074DBRE4 74ACT11074DE4 74ACT11074DR 74ACT11074DRE4 74ACT11074N Contextual Info: 74ACT11074 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET SCAS498A – DECEMBER 1986 – REVISED APRIL 1996 D D D D D D, DB, OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise	Original	74act11074 scas498a 500-ma 300-mil +874act11074d 74act11074dble 74act11074dbr 74act11074dbre4 74act11074de4 74act11074dr 74act11074dre4 74act11074n	PDF
Contextual Info: 74ACT11074 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET SCAS498A – DECEMBER 1986 – REVISED APRIL 1996 D D D D D D, DB, OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise	Original	74act11074 scas498a 500-ma 300-mil	PDF
Contextual Info: 74ACT11074 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET SCAS498A – DECEMBER 1986 – REVISED APRIL 1996 D D D D D D, DB, OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise	Original	74act11074 scas498a 500-ma 300-mil	PDF
Contextual Info: 74ACT11074 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET SCAS498A – DECEMBER 1986 – REVISED APRIL 1996 D D D D D D, DB, OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Center-Pin VCC and GND Configurations to Minimize High-Speed Switching Noise	Original	74act11074 scas498a 500-ma 300-mil +2msso002e mo-150	PDF