74ACT Search Results

Contextual Info: 74ACT11648 OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS _ SCAS115- D3456, MARCH 1990-REVISEDAPRIL 1933 Inputs Are TTL-Voltage Compatible Independent Registers A and B Buses Multiplexed Real-Time and Stored Data Inverting Data Paths

2SC 2320

Abstract: SCAS04QA-P3110
Contextual Info: 54ACT11253,74ACT11253 DUAL 1-0F-4 DATA SELECTORS/MULTIPLEXERS WITH 3-STATE OUTPUTS SCAS040A - D3110, MARCH 1988 - REVISED APRIL 1993 * Inputs Are TTL-Voltage Compatible 54ACT11253 . . . J PACKAGE 74ACT11253 . . . D OH N PACKAGE TOP VIEW * 3-State Version of'ACT11153

Contextual Info: 54ACT11521, 74ACT11521 8-BIT IDENTITY COMPARATORS S C A S Q 2 3 A - D2957, JU L Y 1978- R E V IS E D A P R I L 1993 54ACT11521 . . . J P A C K A G E 74ACT11521 . . . OB, D W O R N P A C K A G E i * Compares Two 8-Bit Words * Inputs Are TTL-Voltage Compatible

1sv 134

Contextual Info: 54ACT11640, 74ACT11640 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCAS027A - D2957, JULY 1987 - REVISED APRIL 1993 54ACT11640. . . JT PACKAGE 74ACT11640 . . . DW OR NT PACKAGE TOP VIEW B idirectional Bus Transceivers In H ig h-D ensity 24-P in Packages

Contextual Info: 74ACT11132 QUADRUPLE POSITIVE-NAND GATE WITH SCHMITT-TRIGGER INPUTS SCAS177 - D3974, JANUARY 1992 - REVISED APRIL 1993 Inputs Are TTL-Voltage Compatible Center-Pin V^c and GND Pin Configurations Minimize High-Speed Switching Noise EP/C Enhanced-Performance Implanted

Contextual Info: 54ACT11652, 74ACT11652 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS TI0123— D3106, DECEMBER 1989 5 4 A C T 11 6 52 . . . J T PACKA GE • Inputs are TTL-Voltage Compatible 7 4 A C T 1 1652 . . . D W OR N T P ACKA G E • Bus Transceivers/Registers

TI0149-D3373

Contextual Info: 54ACT11827, 74ACT11827 10-BIT BUFFERS/BUS DRIVERS WITH 3-STATE OUTPUTS TI0149— D3373, NOVEM BER 19B9— REVISED MARCH 1990 54ACT11827 . . . JT PACKAGE 74ACT11827 . . . DW OR NT PACKAGE • Inputs are TTL-Voltage Compatible 3-State Outputs Drive Bus Lines or Buffer

tl401

Contextual Info: 54ACT11074, 74ACT11074 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET _ SCAS046 - D2957. DECEMBER 1986 - REVISED APRIL 1993 54ACT11074. . . J PACKAGE 74ACT11074. . . D OR N PACKAGE * Inputs Are TTL-Voltage Compatible

Contextual Info: 54ACT11020, 74ACT11020 DUAL 4-INPUT POSITIVE-NAND GATES TI0053— D 2957, JUNE 1987— REVISED JANUARY 1990 • Inputs are TTL-Voltage Compatible 54ACT11020 . . . J PACKAGE 74ACT11020 . . . D OR N PACKAGE • Flow-Through Architecture to Optimize PCB Layout

D3450

Contextual Info: 74ACT11377 OCTAL D-TYPE FLIP-FLOP WITH CLOCK ENABLE SCAS129 - D3450, MARCH 1990 - REVISED APRIL 1993 • * Inputs Are TTL-Voltage Compatible DB, DW OR NT PACKAGE TOP VIEW I * Contains Eight D-Type Flip-Flops I I * Clock Enable Latched to Avoid False Clocking

Contextual Info: 54ACT11241, 74ACT11241 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS T I0073— D2957 JULY 1987— REVISED MARCH 1990 • Inputs are TTL-Voltage Compatible 54A C T 11241 . . . J T P ACKA G E 74A C T11 2 41 . . . D W OH N T P ACKA G E • 3-State Outputs Drive Bus Lines or Buffer

Contextual Info: 74ACT11112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOP WITH CLEAR AND PRESET _ SCAS064A - D3339. JUNE 1989 - REVISED APRIL 1993 D OR N PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Fully Buffered to Offer Maximum Isolation

Contextual Info: 54ACT11874, 74ACT11874 DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS D3447, MAR CH 1990-R E V IS E D O C TO BER 1990 54A C T 11 8 74 . . . J T P A C K A G E Inputs are TTL-Voltage C om patible 74A C T 11 8 74 . . . D W O R N T P A C K A G E

Contextual Info: 74ACT11139 DUAL 2-LINE TO 4-LINE DECODER/DEMULTIPLEXER SCASI 75A - SEPTEMBER 1991 - REVISED APRIL 1996 • Inputs Are TTL-Voltage Compatible • Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems D, N, OR PW PACKAGE TOP VIEW

Contextual Info: 54ACT16543, 74ACT16543 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS TI0194— D3476, MARCH 1990 Members of the Texas Instruments Widebus Family S4ACT16543 . . . WD PACKAGE 74ACT16S43 . . . DL PACKAGE TOP VIEW Packaged in Shrink Small-Outline 300-mil

D3402

Abstract: 74ACT16245
Contextual Info: 54ACT16245, 74ACT16245 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS T I0182— D3402, DECEMBER 1989— REVISED MARCH 1990 54ACT16245 . . . WD PACKAGE 74ACT16245 . . . DL PACKAGE Members of the Texas Instruments Widebus Family TOP VIEW Packaged in Shrink Small Outline 300-mil

t1128

Contextual Info: 54A C T 11286, 74ACT11286 9-BIT PARITY G EN E R A T O R S/C H E C K ER S WITH BU S DRIVER PARITY I/O PORTS TI0124— D3166, AUG U ST 1988— REVISED MARCH 1990 54ACT11286 . . . J PACKAGE 74ACT11286 . . . D O R N PACKAGE • Inputs are TTL-Voltage Compatible

Contextual Info: 74ACT11646 OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS SCAS061 A - D 2957, JULY 1987 - REVISED APRIL 1993 DW PACKAGE TOP VIEW * Independent Registers for A and B Buses

Contextual Info: 74ACT11139 DUAL M IN E TO 4-LINE DECODER/DEMULTIPLEXER SCASI 75 - D3907, SEPTEMBER 1991 - REVISED APRIL 1993 D, N, OR PW PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Designed Specifically for High-Speed Memory Decoders and Data Transmission Systems

D3468

Contextual Info: 54ACT16373, 74ACT16373 16-BIT D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS TI0150— D3468, MARCH 1990 • Member of the Texas Instruments Wldebus Family 54ACT16373 . . . WD PACKAGE 74ACT16373 . . . DL PACKAGE TOP VIEW Packaged In Shrink Small Outline 300-mll

Contextual Info: 74ACT11867 SYNCHRONOUS 8-BIT UP/DOWN BINARY COUNTER WITH ASYNCHRONOUS CLEAR S C A S 1 7 8 - D 3 9 9 0 , D E C E M B E R 1991 - R E V IS E D A P R I L 1 9 9 3 Inputs Are TTL-Voltage Compatible Asynchronous Clear Fully Independent Clock Circuit Simplifies Use

Contextual Info: 54ACT11353, 74ACT11353 DUAL 1-0F-4 DATA SELECTORS/MULTIPLEXERS WITH 3-STATE OUTPUTS SCAS045A- D3109, JUNE 1988 - REVISED APRIL 1993 54ACT11353. . . J PACKAGE 74ACT11535. . , D OR N PACKAGE Inverting Versions of 54ACT11253 and 74ACT11253 TOP VIEW Permits Multiplexing From N Lines

74AC390

Abstract: 74AC54D 74ac841 74AC163 74AC393 74AC245 74AC670 74ac109 74AC623 74ACT640
Contextual Info: SELECTION GUIDE TC74AC/ACT Series Selection Guide NAND 74AC00 74ACTOO NOR 74AC02 74ACT02 AND 74AC08 74ACT08 OR 74AC32 74ACT32 INVERTER, BUFFER 74AC04 74ACT04 EXCLUSIVE OR 74AC86 74ACT86 GATE SCHMITT TRIGGER BUS BUFFER BUFFER BUS TRANSCEIVER 74AC10 74ACT10

Contextual Info: 54ACT11191, 74ACT11191 SYNCHRONOUS 4-BIT UP/DOWN BINARY COUNTERS TI0146— D3455, MARCH 199« 54ACT11191 . . . J PACKAGE 74ACT11191 . . . D W O R N PACKAGE Inputs are TTL-Voltage Compatible Single Down/Up Count Control Line TOP VIEW Look-Ahead Circuitry Enhances Speed ot