74AC11158N Search Results

74AC11158N Result Highlights (1)

Part	ECAD Model	Manufacturer	Description	Download	Buy
74AC11158N		Rochester Electronics LLC	74AC11158 - Multiplexer	PDF

74AC11158N Datasheets (5)

Part	ECAD Model	Manufacturer	Description	Datasheet Type	PDF	PDF Size	Page count
74AC11158N		Texas Instruments	74AC11158 - Quadruple 2-Line To 1-Line Data Selectors/Multiplexers 20-PDIP -40 to 85	Original	PDF	80.8KB	6
74AC11158N		Texas Instruments	Multiplexer, Quad, 2-Input, CMOS, 20-DIP	Original	PDF	70.88KB	5
74AC11158N		Texas Instruments	Quadruple 2-Line To 1-Line Data Selectors/Multiplexers 20-PDIP -40 to 85	Original	PDF	91.15KB	7
74AC11158N		Unknown	Historical semiconductor price guide (US$ - 1998). From our catalog scanning project.	Historical	PDF	39.07KB	1
74AC11158N		Philips Semiconductors	5 V, quad 2-input multiplexer, INV	Scan	PDF	151.95KB	6

74AC11158N Price and Stock

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Rochester Electronics LLC


Rochester Electronics LLC 74AC11158N MULTIPLEXER
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	74AC11158N	Bulk			9	1 - 10 $34.51 100 $34.51 1000 $34.51 10000 $34.51	Buy Now
Rochester Electronics	74AC11158N		1,025		1	1 - 10 - 100 $31.52 1000 $28.20 10000 $26.54	Buy Now

74AC11158N Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
Contextual Info: 74AC11158 QUADRUPLE 2ĆLINE TO 1ĆLINE DATA SELECTOR/MULTIPLEXER ą ą SCAS071 − JULY 1989 − REVISED APRIL 1993 • • • • • DW OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise	Original	74AC11158 SCAS071 500-mA 300-mil	PDF
C11158 Contextual Info: 74AC/ACT11158 Signetics Quad 2-Input Multiplexer; INV A C 11158: Product Specification ACT11158: Preliminary Specification ACL Products GENERAL INFORMATION FEATURES Output capability: ± 2 4 m A • CMOS AC and TTL (ACT) voltage level inputs • • 50Q	OCR Scan	74AC/ACT11158 ACT11158: 10MHz C11158	PDF
Contextual Info: 74AC11158 QUADRUPLE 2ĆLINE TO 1ĆLINE DATA SELECTOR/MULTIPLEXER ą ą SCAS071 − JULY 1989 − REVISED APRIL 1993 • • • • • DW OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise	Original	74AC11158 SCAS071 500-mA 300-mil	PDF
Contextual Info: 74AC11158 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER SCAS071 – JULY 1989 – REVISED APRIL 1993 • • • • • DW OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise	Original	74AC11158 SCAS071 500-mA 300-mil	PDF
Contextual Info: 74AC11158 QUADRUPLE 2ĆLINE TO 1ĆLINE DATA SELECTOR/MULTIPLEXER ą ą SCAS071 − JULY 1989 − REVISED APRIL 1993 • • • • • DW OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise	Original	74AC11158 SCAS071 500-mA 300-mil	PDF
Contextual Info: 74AC11158 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER SCAS071 – JULY 1989 – REVISED APRIL 1993 • • • • • DW OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise	Original	74AC11158 SCAS071 500-mA 300-mil	PDF
74AC11158 Abstract: 74AC11158DW 74AC11158DWR 74AC11158N Contextual Info: 74AC11158 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER SCAS071 – JULY 1989 – REVISED APRIL 1993 • • • • • DW OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise	Original	74AC11158 SCAS071 500-mA 300-mil 74AC11158 74AC11158DW 74AC11158DWR 74AC11158N	PDF
Contextual Info: 74AC11158 QUADRUPLE 2ĆLINE TO 1ĆLINE DATA SELECTOR/MULTIPLEXER ą ą SCAS071 − JULY 1989 − REVISED APRIL 1993 • • • • • DW OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise	Original	74AC11158 SCAS071 500-mA 300-mil	PDF
Contextual Info: 74AC11158 QUADRUPLE 2ĆLINE TO 1ĆLINE DATA SELECTOR/MULTIPLEXER ą ą SCAS071 − JULY 1989 − REVISED APRIL 1993 • • • • • DW OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise	Original	74AC11158 SCAS071 500-mA 300-mil	PDF
Contextual Info: 74AC11158 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER SCAS071 – JULY 1989 – REVISED APRIL 1993 • • • • • DW OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise	Original	74AC11158 SCAS071 500-mA 300-mil	PDF
Contextual Info: 74AC11158 QUADRUPLE 2ĆLINE TO 1ĆLINE DATA SELECTOR/MULTIPLEXER ą ą SCAS071 − JULY 1989 − REVISED APRIL 1993 • • • • • DW OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise	Original	74AC11158 SCAS071 500-mA 300-mil	PDF
74AC11158 Abstract: 74AC11158DW 74AC11158DWR 74AC11158N Contextual Info: 74AC11158 QUADRUPLE 2ĆLINE TO 1ĆLINE DATA SELECTOR/MULTIPLEXER ą ą SCAS071 − JULY 1989 − REVISED APRIL 1993 • • • • • DW OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise	Original	74AC11158 SCAS071 500-mA 300-mil 74AC11158 74AC11158DW 74AC11158DWR 74AC11158N	PDF