74VHC125 Search Results

74HC125

Abstract: 74VHC125 VHC125 74VHC125M 74VHC125MTC 74VHC125MTCX 74VHC125MX 74VHC125N 74VHC125SJ M14A
Contextual Info: Revised February 2005 74VHC125 Quad Buffer with 3-STATE Outputs General Description Features The VHC125 contains four independent non-inverting buffers with 3-STATE outputs. It is an advanced high-speed CMOS device fabricated with silicon gate CMOS technology and achieves the high-speed operation similar to

74VHC125

Abstract: 74VHC125M 74VHC125T TSSOP14
Contextual Info: 74VHC125  QUAD BUS BUFFERS 3-STATE PRELIMINARY DATA • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.8 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA = 25 oC HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS

74VHC125

Abstract: 74VHC125M 74VHC125MTR 74VHC125TTR TSSOP14
Contextual Info: 74VHC125 QUAD BUS BUFFERS 3-STATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.8ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS

74HC125 dip

Abstract: e 3055 t
Contextual Info: ß National Semiconductor 74VHC125 Quad Buffer with TRI-ST ATE( Outputs General Description Features The VHC125 contains four independent non-inverting buff­ ers with TRI-STATE outputs. It is an advanced high-speed CMOS device fabricated with silicon gate CMOS technology

Contextual Info: 74VHC125FT,74VHC126FT CMOS Digital Integrated Circuits Silicon Monolithic 74VHC125FT,74VHC126FT 1. Functional Description • Quad Bus Buffer, Non-Inverted 3-State Outputs 74VHC125FT: Quad Bus Buffer 74VHC126FT: Quad Bus Buffer 2. General The 74VHC125FT/126FT are high speed CMOS QUAD BUS BUFFERs fabricated with silicon gate C2MOS

ic 74series

Abstract: ic top 246 yn 74VHC125 74VHC125M 74VHC125T TSSOP14
Contextual Info: SGS-THOMSON 74VHC125 M IM i[L[I gïïlHΩiD(3S QUAD BUS BUFFERS (3-STATE) P R E L IM IN A R Y D A T A . . HIGH SPEED: tpD = 3.8 ns (TYP.) a tV cc =5V LOW POWER DISSIPATION: Icc = 4 |xA (MAX.) at Ta = 25 °C . HIGH NOISE IMMUNITY: V nih = V nil = 28% Vcc (MIN.)

diode D254

Contextual Info: S E M I C O N D U C T O R -n 74VHC125 Quad Buffer with 3-STATE Outputs Features General Description High Speed: tpd = 3.8 ns typ at Vc c = 5V Lower power dissipation: lcc = 4 |iA (max) at TA = 25'C High noise immunity: VNIH = VNIL = 28% Vcc (min) Powerdown protection is provided on all inputs

74VHC125

Contextual Info: SGS-THOMSON iMiniSiRitaignigfafiRiOBinieg 74VHC125 QUAD BUS BUFFERS 3-STATE PRELIMINARY DATA . HIGH SPEED: tpD = 3.8 ns (TYP.) at Vcc = 5V . LOW POWER DISSIPATION: Icc = 4 |oA (MAX.) at T a = 25 °C . HIGH NOISE IMMUNITY: V nih = V nil = 28% V cc (MIN.)

Contextual Info: S E M IC O N D U C T O R tm 74VHC125 Quad Buffer with 3-STATE Outputs General Description Features The VHC125 contains four independent non-inverting buff­ ers with 3-STATE outputs. It is an advanced high-speed CMOS device fabricated with silicon gate CMOS technology

74hc125an

Abstract: 74HC125 74VHC125 74VHC125M 74VHC125MTC 74VHC125SJ M14A M14D MTC14 VHC125
Contextual Info: 74VHC125 Quad Buffer with 3-STATE Outputs Features General Description • High Speed: tPD = 3.8ns Typ. at VCC = 5V ■ Lower power dissipation: ICC = 4 µA (Max.) at The VHC125 contains four independent non-inverting buffers with 3-STATE outputs. It is an advanced highspeed CMOS device fabricated with silicon gate CMOS

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quad Bus Buffer w ith 3-Stafte Control Inputs M 74VHC125 The M C 74VHC125 is a high speed CMOS quad bus buffer fabricated with silicon gate C M OS technology. It achieves high speed operation similar to equivalent Bipolar Schottky T T L while maintaining C M O S low power

74hc125an

Abstract: 74VHC125 74VHC125SJ M14A M14D VHC125 74HC125 74VHC125M 74VHC125MTC 74VHC125MTCX
Contextual Info: 74VHC125 Quad Buffer with 3-STATE Outputs tm Features General Description • High Speed: tPD = 3.8ns Typ. at VCC = 5V ■ Lower power dissipation: ICC = 4 µA (Max.) at The VHC125 contains four independent non-inverting buffers with 3-STATE outputs. It is an advanced highspeed CMOS device fabricated with silicon gate CMOS

74VHC125

Abstract: 74VHC125M 74VHC125T TSSOP14
Contextual Info: 74VHC125  QUAD BUS BUFFERS 3-STATE PRELIMINARY DATA • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.8 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA = 25 oC HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS

74VHC125

Contextual Info: 74VHC125 Quad Buffer with 3-STATE Outputs Features General Description • High Speed: tPD = 3.8ns Typ. at VCC = 5V ■ Lower power dissipation: ICC = 4 µA (Max.) at The VHC125 contains four independent non-inverting buffers with 3-STATE outputs. It is an advanced highspeed CMOS device fabricated with silicon gate CMOS

74VHC125

Contextual Info: 74VHC125 QUAD BUS BUFFERS 3-STATE PR ELIM IN ARY DATA . HIGH SPEED: tpD = 3.8 ns (TYP.) at Vcc = 5V . LOW POWER DISSIPATION: Icc = 4 |oA (MAX.) at T a = 25 °C . HIGH NOISE IMMUNITY: V nih = V nil = 28% V cc (MIN.) . POWERDOWN PROTECTION ON INPUTS . SYMMETRICAL OUTPUT IMPEDANCE:

74VHC125

Abstract: 74VHC125MTR 74VHC125TTR TSSOP14
Contextual Info: 74VHC125 QUAD BUS BUFFERS 3-STATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.8ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS SYMMETRICAL OUTPUT IMPEDANCE:

74HC125 dip

Abstract: 74HC125 74VHC125 74VHC125M 74VHC125MTC 74VHC125N 74VHC125SJ M14A M14D MTC14
Contextual Info: 74VHC125 Quad Buffer with 3-STATE Outputs General Description Features The VHC125 contains four independent non-inverting buffers with 3-STATE outputs. It is an advanced high-speed CMOS device fabricated with silicon gate CMOS technology and achieves the high-speed operation similar to equivalent

Contextual Info: 74VHC125FT,74VHC126FT CMOS Digital Integrated Circuits Silicon Monolithic 74VHC125FT,74VHC126FT 1. Functional Description • Quad Bus Buffer, Non-Inverted 3-State Outputs 74VHC125FT: Quad Bus Buffer 74VHC126FT: Quad Bus Buffer 2. General The 74VHC125FT/126FT are high speed CMOS QUAD BUS BUFFERs fabricated with silicon gate C2MOS

74VHC125

Abstract: 74VHC125M 74VHC125MTC 74VHC125N 74VHC125SJ M14A M14D MTC14 N14A VHC125
Contextual Info: Revised March 1999 74VHC125 Quad Buffer with 3-STATE Outputs General Description The VHC125 contains four independent non-inverting buffers with 3-STATE outputs. It is an advanced high-speed CMOS device fabricated with silicon gate CMOS technology and achieves the high-speed operation similar to

74VHC125

Abstract: 74VHC125M 74VHC125T TSSOP14 VHC125
Contextual Info: 74VHC125 QUAD BUS BUFFERS 3-STATE PRELIMINARY DATA • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.8 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA = 25 oC HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS

msc 5511

Contextual Info: • taSDllHE G D ? a ö 3 Ei 3 5 T ■ NSC1 February 1994 74VHC125 Quad Buffer with TRI-STATEd Outputs General Description Features The VHC125 contains four independent non-inverting buff­ ers with TRI-STATE outputs. It is an advanced high-speed CMOS device fabricated with silicon gate CMOS technology

A4G1

Contextual Info: SGS-THOMSON 74VHC125 iW QUAD BUS BUFFERS 3-STATE PRELIM IN ARY DATA . . . . . . HIGH SPEED: tPD = 3.8 ns (TYP.) at Vcc = 5V LOW POWER DISSIPATION: Ice = 4 \iA (MAX.) at Ta = 25 °C HIGH NOISE IMMUNITY: V nih = V nil = 28% Vcc (MIN.) POWER DOWN PROTECTION ON INPUTS

VHCT125

Abstract: NA1211 74VHC125 74VHC126 74VHCT125 JESD22-A114E
Contextual Info: 74VHC125; 74VHCT125 Quad buffer/line driver; 3-state Rev. 02 — 13 October 2009 Product data sheet 1. General description The 74VHC125; 74VHCT125 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL LSTTL . They are specified in compliance with

74HC125

Abstract: 74HC125 dip vhc125 74VHC125 74VHC125M 74VHC125MTC 74VHC125N 74VHC125SJ M14A M14D
Contextual Info: 74VHC125 Quad Buffer with TRI-STATE Outputs General Description Features The VHC125 contains four independent non-inverting buffers with TRI-STATE outputs It is an advanced high-speed CMOS device fabricated with silicon gate CMOS technology and achieves the high-speed operation similar to equivalent