74LVX125 Search Results

lvx125

Abstract: 74LVX125 74LVX125M 74LVX125MTC 74LVX125MTCX 74LVX125MX 74LVX125SJ 74LVX125SJX M14A
Contextual Info: LVX125 National Semiconductor 74LVX125 Low-Voltage Quad Buffer with TRI-STATE Outputs General Description Features The LVX125 contains four independent non-inverting buff­ ers with TRI-STATE outputs. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems.

Contextual Info: S E M IC O N D U C T O R 74LVX125 Low Voltage Quad Buffer w ith 3-STATE O utputs General Description Features The LVX125 contains lour independent non-inverting buffers with 3-STATE outputs. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems.

Contextual Info: Revised March 1999 S E M I C O N D U C T O R TM 74LVX125 Low Voltage Quad Buffer with 3-STATE Outputs General Description Features The LVX125 contains fo u r independent non-inverting buff­ ers with 3-STATE outputs. The inputs tolerate voltages up to 7V allow ing th e interface of 5V system s to 3V system s.

74LVX125

Abstract: 74LVX125M 74LVX125MTR 74LVX125TTR TSSOP14
Contextual Info: 74LVX125 LOW VOLTAGE QUAD BUS BUFFERS 3-STATE WITH 5V TOLERANT INPUTS • HIGH SPEED: tPD=4.4ns (TYP.) at VCC = 3.3V ■ 5V TOLERANT INPUTS ■ POWER-DOWN PROTECTION ON INPUTS ■ INPUT VOLTAGE LEVEL: VIL = 0.8V, VIH = 2V at VCC =3V LOW POWER DISSIPATION:

74LVX125

Abstract: 74LVX125M 74LVX125T LVX125 TSSOP14
Contextual Info: 74LVX125  LOW VOLTAGE QUAD BUS BUFFERS 3-STATE WITH 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 4.4 ns (TYP.) at VCC = 3.3V 5V TOLERANT INPUTS POWER-DOWN PROTECTION ON INPUTS INPUT VOLTAGE LEVEL: VIL = 0.8V, VIH = 2V at VCC = 3V

LVX125

Abstract: 74LVX125 74LVX125M 74LVX125MTC 74LVX125SJ M14A M14D MTC14
Contextual Info: Revised March 1999 74LVX125 Low Voltage Quad Buffer with 3-STATE Outputs General Description Features The LVX125 contains four independent non-inverting buffers with 3-STATE outputs. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems.

74LVX125

Abstract: 74LVX125M 74LVX125MTC 74LVX125SJ LVX125 M14A M14D MTC14
Contextual Info: S E M I C O N D U C T O R Revised M arch 1999 TM 74LVX125 Low Voltage Quad Buffer with 3-STATE Outputs General Description Features The LVX125 contains four independent non-inverting buff­ ers with 3-STATE outputs. The inputs tolerate voltages up to 7V allowing th e interface of 5V system s to 3V system s.

LVX125

Abstract: 74LVX125
Contextual Info: LVX125 33 National mm Semiconductor 74LVX125 Low-Voltage Quad Buffer with TRI-STATE Outputs General Description Features The LVX125 contains four independent non-inverting buff­ ers with TRI-STATE outputs. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems.

74LVX125

Abstract: 74LVX125M 74LVX125MTC 74LVX125SJ LVX125 M14A M14D MTC14
Contextual Info: Revised December 2003 74LVX125 Low Voltage Quad Buffer with 3-STATE Outputs General Description Features The LVX125 contains four independent non-inverting buffers with 3-STATE outputs. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems.

Contextual Info: 74LVX125 Low Voltage Quad Buffer with 3-STATE Outputs Features General Description • Input voltage level translation from 5V to 3V The LVX125 contains four independent non-inverting buffers with 3-STATE outputs. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V

LVX125

Abstract: 74LVX125 74LVX125M 74LVX125MTC 74LVX125MTCX 74LVX125SJ M14A M14D MTC14
Contextual Info: Revised February 2005 74LVX125 Low Voltage Quad Buffer with 3-STATE Outputs General Description Features The LVX125 contains four independent non-inverting buffers with 3-STATE outputs. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems.

74LVX125

Abstract: 74LVX125M 74LVX125MTC 74LVX125SJ LVX125 M14A M14D MTC14
Contextual Info: S E M IC O N D U C T O R tm 74LVX125 Low Voltage Quad Buffer with 3-STATE Outputs General Description Features The LVX125 contains four independent non-inverting buffers with 3-STATE outputs. T he inputs tolerate voltages up to 7V allowing th e interface of 5V system s to 3 V system s.

74LVX125

Abstract: 74LVX125M 74LVX125MTC 74LVX125SJ LVX125 M14A M14D MTC14
Contextual Info: 74LVX125 Low Voltage Quad Buffer with 3-STATE Outputs Features General Description • Input voltage level translation from 5V to 3V The LVX125 contains four independent non-inverting buffers with 3-STATE outputs. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V

74LVX125

Abstract: 74LVX125M 74LVX125MTR 74LVX125TTR TSSOP14
Contextual Info: 74LVX125 LOW VOLTAGE QUAD BUS BUFFERS 3-STATE WITH 5V TOLERANT INPUTS • HIGH SPEED: tPD=4.4ns (TYP.) at VCC = 3.3V ■ 5V TOLERANT INPUTS ■ POWER-DOWN PROTECTION ON INPUTS ■ INPUT VOLTAGE LEVEL: VIL = 0.8V, VIH = 2V at VCC =3V ■ LOW POWER DISSIPATION:

Contextual Info: S E M [CONDUCTOR TM 74LVX125 Low Voltage Quad Buffer with 3-STATE Outputs General Description Features The LVX125 contains four independent non-inverting buff­ ers with 3-STATE outputs. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems.

Contextual Info: M O T O R O LA SEMICONDUCTOR TECHNICAL DATA Quad Bus B uffer M C 74LVX125 W ith 5V-Tolerant In p u ts The 74LVX125 is an advanced high speed CMOS quad bus buffer. The inputs tolerate voltages up to 7V, allowing the interface of 5V systems to 3V systems.

74LVX125

Abstract: 74LVX125MTR 74LVX125TTR TSSOP14 74LVX125 so14
Contextual Info: 74LVX125 LOW VOLTAGE QUAD BUS BUFFERS 3-STATE WITH 5V TOLERANT INPUTS • HIGH SPEED: tPD=4.4ns (TYP.) at VCC = 3.3V ■ 5V TOLERANT INPUTS ■ POWER-DOWN PROTECTION ON INPUTS ■ INPUT VOLTAGE LEVEL: VIL = 0.8V, VIH = 2V at VCC =3V ■ LOW POWER DISSIPATION:

74LVX125

Abstract: 74LVX125M 74LVX125MTC 74LVX125MTCX 74LVX125MX 74LVX125SJ 74LVX125SJX LVX125 M14A M14D
Contextual Info: 74LVX125 Low-Voltage Quad Buffer with TRI-STATE Outputs General Description Features The LVX125 contains four independent non-inverting buffers with TRI-STATE outputs The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems

LVX125

Abstract: 74LVX125 74LVX125M 74LVX125MTC 74LVX125SJ M14A M14D MTC14
Contextual Info: 74LVX125 Low Voltage Quad Buffer with 3-STATE Outputs General Description Features The LVX125 contains four independent non-inverting buffers with 3-STATE outputs. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. n Input voltage level translation from 5V to 3V

TTL 74-series IC LIST

Abstract: 74 Series Logic ICs TTL 74-series IC PO74G74 PO74G04 list cmos ics 49fct32805 49FCT3807 Potato Semiconductor 49FCT3805
Contextual Info: 04/18/07 Pin to Pin & Package to Package Compatible IC List Standard 1.65V -3.6 V TTL / CMOS Clock Buffer PotatoSemi PO49FCT3802A 1GHz 1 to 5 PO49FCT3803B 700MHz 1 to 7 PO49FCT3804 800MHz 2X1 to 4 PO49FCT3805B 800MHz 2X1 to 5 PO49FCT3806 750MHz 2X1 to 5 PO49FCT3807B

5555 FAIRCHILD optocoupler

Abstract: MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N
Contextual Info: R E L I A B L E . L O G I C . I N N O V A T I O N . Logic Cross-Reference Logic Cross-Reference 2003 Texas Instruments Printed in the U.S.A. by Texoma Business Forms, Durant, Oklahoma Printed on recycled paper. SCYB017A NEW First Revision Logic Cross-Reference

74LVT JK Flip Flop

Abstract: led driver SOT23 6pin lcx244 MOTOROLA lcx 4245 LCX244 quad single supply 50 Ohm Line Drivers diode sj Fairchild Power Switch package to 220 p5 MAX 16841 On semiconductor LCX 574 PA
Contextual Info: 1 Chapter 1 Introduction to Low-Voltage Logic Chapter C R O S S V O L T Parts & Availability 17 Packaging Options 37 Low-Voltage Logic Cross Reference 49 Glossary 57 Fairchild Low-Voltage Logic Reference Guide Chapter Chapter Glossary  Introduction to Low-Voltage Logic

Contextual Info: ALPHANUMERICAL INDEX LCX FAMILY Type Number Function Package Page Number 51 74LCX00 Quad 2-Input NAND Gate with 5V Tolerant Input TSS0P/S014 74LCX02 Quad 2-Input NOR Gate with 5V Tolerant Input TSS0P/S014 57 74LCX04 Hex Inverter with 5V Tolerant Input TSS0P/S014

schematic diagram atx Power supply 500w

Abstract: pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS
Contextual Info: QUICK INDEX NEW IN THIS ISSUE! Detailed Index - See Pages 3-24 Digital Signal Processors, iCoupler , iMEMS® and iSensor . . . . . 805, 2707, 2768-2769 Connectors, Cable Assemblies, IC Sockets . . . . . . . . . . . 28-568 RF Connectors . . . . . . . . . . . . . . . . . . . . . . Pages 454-455