74LS195A Search Results

Contextual Info: Am25LS194A • Am54LS/74LS194A Am25LS195A • Am54LS/74LS195A Four-Bit High-Speed Shift Registers D IS TIN C TIV E C H AR A C TE R IS TIC S • • • • • LOGIC D IA G R A M S S hift righ t or parallel load w ith JK inputs on A m 25LS 195A S hift le ft, right, parallel load or do nothing on A m 25LS 194A

Contextual Info: GD54/74LS195A 4-BIT PARALLEL ACCESS SHIFT REGISTERS Features • • • • • • • Synchronous parallel load Positive-edge-triggered clocking Parallel inputs and outputs from each flip-flop Direct overriding clear J and K inputs to first stage Complementary outputs from last stage

74LS195A

Abstract: LS195A SN54LSXXXJ SN74LSXXXD SN74LSXXXN
Contextual Info: SN54/74LS195A UNIVERSAL 4-BIT SHIFT REGISTER The SN54 / 74LS195A is a high speed 4-Bit Shift Register offering typical shift frequencies of 39 MHz. It is useful for a wide variety of register and counting applications. It utilizes the Schottky diode clamped process to

74195 TTL shift register

Abstract: 74195 logic diagram 74195 shift register 54195DM 74195DC 74195FC 74195PC 74LS195ADC 74LS195AFC 74LS195APC
Contextual Info: 195 C O N N E C T IO N D IAG RAM P IN O U T A u f\ ¡4/74195 01 54LS /74LS195A W iW *' ^ ÖI UNIVERSAL 4-BIT SHIFT REGISTER MR [ 7 D E S C R IP T IO N — T he '195 is a hig h speed 4 -b it s h ift re g iste r o ffe rin g ty p ic a l s h ift fre q u e n c ie s o f 50 M H z. It is useful fo r a w ide v a rie ty o f re g iste r and

DN74LS195A

Abstract: MA161
Contextual Info: LS TTL DN74LS Series 74LS195A 74LS195A 7 4 u s i q s ^ 4 - b it P a r a lle l- A c c e s s Shift R egisters • D e s c rip tio n D N 74LS195A is a 4-bit serial/parallel input to serial/parallel o u tp u t shift register w ith direct-coupled reset inputs.

HD74LSoop

Abstract: 1S2074 74LSOO HD74LS195A Hitachi Scans-001 Scans-0014928
Contextual Info: H D 74 L S 19 5A . 4-b¡t Parallel-Access Shift Registers This 4-bit register features parallel inputs, parallel outputs. is loaded into the associated flip-flop and appears at the out­ puts after the positive transition of the clock input. During loading, serial data flow is inhibited. Shifting is accomplished

C350AVB

Abstract: full adder using Multiplexer IC 74150 74LS382 74ls69 T2D 7N IC 74ls147 pin details 74LS396 MB652xxx 651XX 74LS86 full adder
Contextual Info: FUJITSU MICROELECTRONICS F U JIT S U wmmm 7flC D B 37MT7bH □D03c]4b 3 • JZ CMOS Gate Array GENERAL INFORMATION The Fujitsu CM O S gate array fam ily consists of tw en tyeight device types which are fabricated w ith advanced silicon gate CMOS technology. And more than 14 devices

IC AND GATE 7408 specification sheet

Abstract: 74LS183 74LS96 SN 74168 7486 XOR GATE IC 74LS192 IC 7402, 7404, 7408, 7432, 7400 IC 7486 for XOR gate IC 74183 74LS193 function table
Contextual Info: PLS-EDIF Bidirectional EDIF Netlist Interface to MAX+PLUS Software Data Sheet September 1991, ver. 3 Features u J Provides a bidirectional netlist interface b etw ee n M A X + P L U S and other m ajor C A E softw are packages Sup ports the industry-standard Electronic Design Interchange Format

sn 74373

Abstract: SN 74114 logic diagram of ic 74112 IC 7486 xor IC 7402, 7404, 7408, 7432, 7400 7486 xor IC sn 74377 IC TTL 7486 xor IC TTL 7495 diagram and truth table IC 74374
Contextual Info: PLS-WS/SN MAX+PLUS II Programmable Logic Software for Sun Workstations Data Sheet September 1991, ver. 1 Features J J □ □ □ J □ IJ Softw are supp ort for Classic, M A X 5000, M A X 7000, and S T G EPLD s Runs on Sun S P A R C s ta tio n s with S u n O S version 4.1.1 or h igher

SN74LS195

Abstract: SN54LS195A
Contextual Info: TYPES SNS4195, SN54LS195A, SN54S195, SN74195, 74LS195A. SN74S195 4-BIT PARALLEL-ACCESS SHIFT REGISTERS MARCH 1974-REVISED APRIL 1985 Synchronous Parallel Load SN54195, SN54LS195A, SN54S195 . . . J OR W PACKAGE SN74195 . . . J OR N PACKAGE 74LS195A, SN74S195 . . D, J OR N PACKAGE