74AUP1T34 Search Results

74AUP1T34GF

Abstract: 74AUP1T34GM MO-203
Contextual Info: 74AUP1T34 Low-power dual supply translating buffer Rev. 2 — 19 August 2010 Product data sheet 1. General description The 74AUP1T34 provides a single buffer with two separate supply voltages. Input A is designed to track VCC A . Output Y is designed to track VCC(Y). Both, VCC(A) and VCC(Y)

Contextual Info: 74AUP1T34 Low-power dual supply translating buffer Rev. 4 — 16 March 2012 Product data sheet 1. General description The 74AUP1T34 provides a single buffer with two separate supply voltages. Input A is designed to track VCC A . Output Y is designed to track VCC(Y). Both, VCC(A) and VCC(Y)

Contextual Info: 74AUP1T34 Low-power dual supply translating buffer Rev. 01. — 17 January 2006 Preliminary data sheet 1. General description The 74AUP1T34 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.

Contextual Info: 74AUP1T34 Low-power dual supply translating buffer Rev. 4 — 16 March 2012 Product data sheet 1. General description The 74AUP1T34 provides a single buffer with two separate supply voltages. Input A is designed to track VCC A . Output Y is designed to track VCC(Y). Both, VCC(A) and VCC(Y)

Contextual Info: 74AUP1T34 Low-power dual supply translating buffer Rev. 5 — 4 September 2013 Product data sheet 1. General description The 74AUP1T34 provides a single buffer with two separate supply voltages. Input A is designed to track VCC A . Output Y is designed to track VCC(Y). Both, VCC(A) and VCC(Y)

74AUP1T34GF

Abstract: 74AUP1T34GM MO-203
Contextual Info: 74AUP1T34 Low-power dual supply translating buffer Rev. 01 — 4 December 2006 Product data sheet 1. General description The 74AUP1T34 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.

Contextual Info: 74AUP1T34 Low-power dual supply translating buffer Rev. 3 — 28 November 2011 Product data sheet 1. General description The 74AUP1T34 provides a single buffer with two separate supply voltages. Input A is designed to track VCC A . Output Y is designed to track VCC(Y). Both, VCC(A) and VCC(Y)

Contextual Info: 74AUP1T34-Q100 Low-power dual supply translating buffer Rev. 1 — 5 June 2013 Product data sheet 1. General description The 74AUP1T34-Q100 provides a single buffer with two separate supply voltages. Input A is designed to track VCC A . Output Y is designed to track VCC(Y). Both, VCC(A) and VCC(Y)

Contextual Info: NXP dual-supply voltage translators AUP, AVC & LVC families Low-power, high-speed, dual-supply voltage translation 0.8 to 5.5 V Available in a variety of innovative packages and with varying bit counts, these highly efficient, dual-supply devices perform bidirectional voltage translation in the ranges of 0.8 to 3.6 V and

hef4051

Abstract: 74AUP2G34 74LVT1403 74ABT543A 74LV74 74AVCH1T45 74HC590 CBTD3306 NCX2200 74HC40103
Contextual Info: ロジック IC データスイッチ/アナログスイッチ コンパレータ レベルシフタ 汎用ロジック Index 2 ●● P3 NXP ロジック ●● P4 低抵抗アナログスイッチ/データスイッチ ●● P7 コンパレータ ●●