74AS6 Search Results

74AS646

Contextual Info: D M 54AS646/ D M 74AS646, DM54AS648/ 74AS648 NATIONAL SEMICOND {LOGIC} bl 6 501122 NATIONAL - T| bSOllES 005170^ 4 m SEMICONDUCTOR 61C 5 1789 D National Semiconductor -pSS-31 PRELIMINARY DM54AS646,648/74AS646,648 Octal Bus Transceivers and Registers

Contextual Info: MITSUBISHI -CDGTL LOGIC} 6249827 MITSUBISHI <DGTL LOGIC 9 1 D 12236 D D E I bEMTflS? 001253b T i~~ • MITSUBISHI ASTTLs M 74AS623P T -S T 3 -3 t SO!"' pa'31" “ OCTAL BUS TRANSCEIVER W ITH 3-STATE OUTPUT NONINVERTED) DESCRIPTION The 74AS623P is a semiconductor integrated circuit

Contextual Info: MITSUBI SHI -CDGTL LOGIC} o ¿ 4 y ÖZ 7 M I T S U B I S H I DGTL L O GI C -tW 9 1 D 12233 D C X LEMMAS? 0015233 M IT S U B IS H I ASTTLs M 74AS620P \ ^ T * * - 3 / • OCTAL BUS TRANSCEIVER W IT H 3-STA TE O UTPUT (IN V E R T E D ) '& * * * DESCRIPTION

Contextual Info: p o n m ir T SN 54A S632, SN 5 4 A S6 3 4 PRFVIFW 74AS632, SN 74AS634 32-BIT PARALLEL ERROR DETECTION AND CORRECTION CIRCUITS D 2 6 6 1 , JAN U A R Y 1986 • D etects and Corrects Single-Bit Errors • D etects and Flags Dual-Bit Errors • Built-In Diagnostic Capability

74ALS649

Abstract: SN74ALS646 74AS646
Contextual Info: SM5 4ALS646 THRU SN54ALS649, SN54AS646, SN54AS648 SN74ALS646 THRU SN 74ALS649 , SN 74AS6 4 6, 74AS648 OCTAL BUS TRANSCEIVERS AN D REGISTERS D 2 6 6 1 , DECEMBER 1 9 8 3 - M A Y 1 9 8 6 M u ltip lex e d R eal-T im e and S to re d D ata C hoice o f T ru e or In verting D a ta Paths

SN74ALS644

Abstract: 74ALS641 S642 SN74AS644
Contextual Info: SP TALS64QA THRU SN54ALS645A, SN 54AS640 THRU SN54AS645 S N /4 A L S6 4 0 A THRU SN74ALS645A, SN 74AS640 THRU 74AS645 OCTAL BUS TRANSCEIVERS D 2 6 6 1 , DECEMBER 1 9 8 3 -R E V IS E D M A Y 1986 S N 5 4 A L S ', S N 5 4 A S ' . . J P AC KAG E S N 7 4 A L S '. S N 7 4 A S ' . . . D W OR N PAC KA G E

74as643

Abstract: 74as645 DM74ALS 74AS642 74AS640 74AS644
Contextual Info: DM54/74AS640, DM54/74AS641, DM54/74AS642, DM54/74AS643, DM54/74AS644, DM54/74AS645 TRI-STATE Octal Bus Transceiver General Description Th is fa m ily o f a d va n ce d S c h o ttk y d evice s c o n ta in s 8 p a irs o f TRI-STATE lo g ic e le m e n ts co n fig u re d as o c ta l bus

Contextual Info: MITSUBISHI ASTTLs s* M 74AS640P OCTAL BUS TRANSCEIVER W ITH 3-STATE OUTPUT INVERTED DESCRIPTION The PIN CONFIGURATION (TOP VIEW) M 7 4 A S 6 4 0 P is a s e m ic o n d u c to r in te g ra te d c irc u it — co n s is tin g of e ig h t bu s tr a n s m itte r /r e c e iv e r c irc u its w ith

SN74AS644

Abstract: 74ALS643 T6141 als641a SN74ALS644 sn74as642 SN54ALS645A SN54AS640 SN54AS645 SN74AS640
Contextual Info: SN54ALS640A THRU SN 54ALS645 A, SN54AS640 THRU SN54AS645 S N 74 A LS 6 4 0 A THRU S N 74 A LS 6 4 5 A , SN 74AS6 40 THRU 74AS645 OC TAL BUS TRANSC EIVERS D 2 6 6 1 , DECEMBER 19 8 3 -R E V IS E D M A Y 1 9 8 6 S N 5 4 A L S ', S N 5 4 A S ' . . . J P AC KA G E

74AS651

Contextual Info: TEXAS INSTR LOGIC 31E I) • flRb!7S3 0Dflfl2ba 3 ■ T I I 3 ' SN54ALS651 THRU SN54ALS654, SN54AS651, SN54AS652 SN74ALS651 THRU SN74ALS654, SN 74AS651, 74AS652 OCTAL BUS TRANSCEIVERS AND REGISTERS “ 5 Z - 3 \ 'O Q D2661, DECEMBER 1983-REV ISED JAN U AR Y 1990

071CN

Contextual Info: JtiK " >' P54/74FCT632/U/A/B P54/74PCT632/U/A/B ULTRA HIGH SPEED 32-BIT ERROR DETECTION AND CORRECTION UNITS 7$ FEATURES • Function, Pinout, and Drive Compatible with the FCT, F Logic and 74AS632 ■ 24 mA Sink Current (Com’l), 12 mA (Mil) 2.6 mA Source Current (Com’l), 1 mA (Mil)

Contextual Info: MITSUBISHI -CDGTL LOGIC} TI 6249827 M ITS U B IS H I DE I tj54Tfl57 D01S345 4 CDGTL L O G I U ; .• 9 1D 1 2 2 4 2 D MITSUBISHI ASTTLs M 74AS645P OCTAL BUS TRANSCEIVER W ITH 3-STATE OUTPUT NONINVERTED DESCRIPTION The 74AS645P is a semiconductor integrated circuit

74AS640

Abstract: 74AS641 74as645 74as643 74AS642 74as640 characteristics 74AS644
Contextual Info: NATIONAL SEMICOND {LOGIC} bl DÎT! h S D U E S DDS17Ö4 S 0 T-5S-3I E g l National à jm S e m i c o n d u c t o r DM54/74AS640, DM54/74AS641, DM54/74AS642, DM54/74AS643, DM54/74AS644, DM54/74AS645 TRI-STATE Octal Bus Transceiver General Description Improved AC performance over Schottky, low power

Contextual Info: P54/74FCT632/U/A/B P54/74PCT632/U/A/B ULTRA HIGH SPEED 32-BIT ERROR DETECTION AND CORRECTION UNITS ¿4- FEATURES • Function, Pinout, and Drive Compatible with the FCT, F Logic and 74AS632

SN54ALS620A

Abstract: SN74ALS620A SN74ALS623A SN74AS623
Contextual Info: SN54ALS620A THRU SN54ALS623A, SN54AS620 THRU SN54AS623 SN74ALS620A THRU SN74ALS623A, 74AS620 THRU 74AS623 OCTAL BUS TRANSCEIVERS D 2 6 6 1 , DECEM BER 1 9 8 2 TOP V IE W • C hoice of T ru e or In ve rtin g Logic A 1 A2 A3 • C hoice of 3 -S ta te or O p en -C o lle c to r O u tp u ts

SN74AS644

Abstract: sn74as642 SN54ALS645A SN54AS640 SN54AS645 SN74ALS645A SN74AS640 SN74AS645 als641 sn74als644
Contextual Info: SN54A LS640A THRU SN54A LS645A , SN 54A S 640 THRU SN 54A S 645 SN74A LS640A THRU SN74A LS645A , S N 74A S 640 THRU S N 74A S645 OCTAL BUS TRANSCEIVERS D 2 6 6 1 , DECEMBER 19 8 3 - REVISED M A Y 198 6 S N 5 4 A L S ', S N 5 4 A S ' . . . J P AC KA G E S N 7 4 A L S ', S N 7 4 A S ' . . . D W OR N PAC KAG E

Contextual Info: P54/74PCT632/U/A/B, P54/74PCT633/U/A/B F^EUHOlMâlRY P54/74PCT634/U/A/B, P54/74PCT635/U/A/B ULTRA HIGH SPEED 32-BIT ERROR DETECTION AND CORRECTION UNITS -FEATURES • TH-State and Open-Collector Output Options

p521 bl

Abstract: p521 b 30405Q
Contextual Info: SN54AS885, SN74AS885 8-BIT MAGNITUDE COMPARATORS SDAS236A- DECEMBER 1982 - REVISED JANUARY 1995 Latchable P-lnput Ports With Power-Up Clear Choice of Logical or Arithmetic Two’s Complement Comparison Data and PLE Inputs Utilize pnp Input Transistors to Reduce dc Loading Effects

GE AS634

Abstract: TIC 2260
Contextual Info: SN54AS632, SN54AS634 74AS632, 74AS634 32 BIT PARALLEL ERROR DETECTION AND CORRECTION CIRCUITS PRODUCT PREVIEW D2661, JANUARY 1986 • Detects and Corrects Single-Bit Errors • Detects and Flags Dual-Bit Errors • Built-In Diagnostic Capability • Fast Write and Read Cycle Processing

74ALS653

Abstract: 74ALS654
Contextual Info: SN54ALS651 THRU SN54ALS654, SN54AS651, SN54AS652 S N74ALS651 THRU S N 74ALS65 4, S N 74 A S 6 5 1 , 74AS652 O CTAL BUS TRANSCEIVERS AN D REGISTERS D 2 6 6 1 , DECEMBER 1 9 8 3 -R E V IS E D M A Y 1 9 8 6 • Bus Transceivers/Registers • Independent Registers and Enables for A

Contextual Info: SN54ALS640B, SN54AS640, SN74ALS640B, 74AS640 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDAS122A – DECEMBER 1983 – REVISED JANUARY 1995 • • Bidirectional Bus Transceivers in High-Density 20-Pin Packages Inverting Logic Package Options Include Plastic

Contextual Info: SN54ALS646 THRU SN54ALS649. SN54AS646, SN54AS648 SN74ALS646 THRU SN74ALS649, 74AS646, 74AS648 OCTAL BUS TRANSCEIVERS AND REGISTERS D 2 6 6 1 , DECEMBER 1 9 8 3 - M A Y 1 9 8 6 S N 54A LS , S N 54A S ' . S IM 74A LS '. S N 7 4 A S ' Multiplexed Real-Time and Stored Data

Contextual Info: SN74ALS638A, SN74ALS639A, 74AS638A, 74AS639 OCTAL BUS TRANSCEIVERS SDAS123A-DECEM BER 1983 - REVISED JANUARY 1995 Bidirectional Bus Transceivers in High-Density 20-Pin Packages DW OR N PACKAGE TOP VIEW Choice of True or Inverting Logic D IR [ 1 A-Bus Outputs Are Open Collector;

06L 617

Abstract: B1218 SN54ALS646 SN54AS646 SN74ALS649 SN74AS646 SN74AS648 SN74ALS647 600SI
Contextual Info: S N 5 4 A L S 6 4 6 THRU S N 5 4 A L S 6 4 9 . S N 5 4 A S 6 4 6 , S N 5 4 A S 6 4 8 S N 74A L S G 46 THRU S N 7 4 A L S 6 4 9 , S N 7 4 A S 6 4 6 , S N 7 4 A S 6 4 8 OCTAL BUS TRANSCEIVERS A ND REGISTERS D 2 6 6 1 , DECEM BER 1 9 8 3 - M A Y S N 54A LS , S N 54A S ' .