7472 PIN DIAGRAM Search Results

ic 7472

Abstract: ic 7472 pin diagram
Contextual Info: ANALOG DEVICES 1.75 MSPS, 4 mW 10-Bit/I 2-Bit Parallel ADCs A D 74 70 /A D 74 72 FEATURES Specified for V DD of 2.7 V to 5.25 V 1.75 MSPS for AD7470 10-Bit 1.5 MSPS for AD7472 (12-Bit) Low Power AD7470: 3.34 mW Typ at 1.5 MSPS w ith 3 V Supplies 7.97 mW Typ at 1.75 MSPS w ith 5 V Supplies

7472 PIN DIAGRAM

Abstract: 74574 74LS112 74LS74 7473 dual JK 7472 ttl TTL 7472 7472 ci CI 7473 pin diagram of ttl 7476
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL MASTER/SLAVE ui 3 Q </> “ UI 0 (9 D50 9000 D51 9001 D54 54/7470 13 2 A zz J So 0 g1 o° CP = Q. 1 H H (0 2 O O Q. EDGE-TRIGGERED ¡so J. So O « J. S d 0 —6 CP J . KC Äo Qo -n — J— K Q CD Vcc = Pin 14

ic 7472 pin diagram

Abstract: 7472 Flip-Flop pin diagram of 7472 7472PC 7472 PIN DIAGRAM
Contextual Info: NA TIO NAL SEDICOND -CLOGIO OSE D | bSD1152 DGti371G 3 | j 2 T~V^07~0r CO NN ECTIO N DIAGRAMS PINO UT A 54/7472 54H/74H72 JK M A S T E R /S L A V E FLIP-FLOP W ith A N D Inputs DESCRIPTION — The '72 is a high speed JK master/slave flip -flo p with AND

7472 PIN DIAGRAM

Abstract: 74ls112 pin diagram 74LS112 TTL 74107 74LS74 7473 pin diagram 74h106 7476 CI 7473 Jk 7476
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL MASTER/SLAVE D59a 54H/74H78 13 A 4 — J. 9— 10 So « Q — 2 J U» CP o 1— CD 0—3 ¿ So Q CP 8_ K Ä Q Co —I I_ Vcc = Pin 14 GND = Pin 7 in Ü Q UJ EDGE-TRIGGERED 9 O (9 D58 54H/74H106 D59b 54H/74H108

TTL 74ls74

Abstract: 74ls74 CI 7473 TTL 7474 7476 JK ttl 7474 14 PIN Jk 7476 7474 PIN DIAGRAM pin diagram 7474 7474 16 PIN
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL -TTL MASTER/SLAVE EDGE-TRIGGERED D55 9020 D60 9024, 54/74109, 54S/74S109, 54LS/74LS109 5 ui 9 D UJ -=pi (3 J Q 2 — J SD 0 CP Z o (3 4 K Ä Co “LT in > </> O a 3 -0 K Co ° I- 3 a. I- 3 O 4-0 Co ? 15 D61 54/7474, 54H/74H74,

ic 7472 pin diagram

Abstract: RTA dbx MH 7472 ls 7472
Contextual Info: ANALOG DEVICES 1.75MSPS, 4mW 10-Bit/12-Bit SAR ADC ÆD7470/72 Preliminary Technical Data FEATURES Specified for V DD of 2.7 V to 5.25 V 1.75M SPS for AD7470 10-Bit 1.5M SPS for AD7472 (12-Bit) Low Power: 3m W typ at 1.75M SPS w ith 3V Supplies 9m W typ at 1.75M SPS w ith 5V Supplies

Contextual Info: 2.7 V to 5.25 V,2MSPS ^ ANALOG Low Power, 10-Bit/12-Bit ADC ^ D E V IC E S _ _ _ _ _ _ _ _ _ _ _ _ _ Preliminary Technical Data Preliminary Technical Data AD7470/AD7472 FEATURES Fast T hroughput Rate: 2M SPS for A D7470 1.75M SPS for AD7472 Specified for V DD of 2.7 V to 5.25 V

Contextual Info: ANALOG ► DEVICES Preliminary Technical Data FEATURES Specified for V DD of 2.7 V to 5.25 V 1.75M SPS for A D7470 10-Bit 1.5M SPS for AD7472 (12-Bit) Low Power: 3m W typ a t 1.75M SPS w ith 3V Supplies 9m W typ a t 1.75M SPS w ith 5V Supplies W id e Input Bandwidth:

7474 shift register

Abstract: 74F673ASPC 7475 tristate buffer 7472 PIN DIAGRAM 7473 national
Contextual Info: 673A National Semiconductor 74F673A 16-Bit Serial-ln, Serial/Parallel-Out Shift Register General Description Features The ’F673A contains a 16-bit serial-in, serial-out shift regis­ ter and a 16-bit parallel-out storage register. A single pin serves either as an input for serial entry or as a TRI­

ic 7472 pin diagram

Abstract: 95852
Contextual Info: 673A National Semiconductor & 74F673A 16-Bit Serial-In, Serial/Parallel-Out Shift Register G eneral Description Features The 'F673A contains a 16-bit serial-in, serial-out shift regis­ ter and a 16-bit parailei-out storage register. A single pin serves either as an input for serial entry or as a TRI­

Contextual Info: SN5472, SN7472 AND-GATED J-K MASTER-SLAVE FLIP-FLOPS WITH PRESET AND CLEAR DECEMBER 1983 - I I • Package Options Include Plastic and Ceramic DIPs and Ceramic Flat Packages I I • Dependable Texas Instruments Quality and Reliability REVISED MARCH 1988 SN 5472 . . . J PACKAG E

Contextual Info: ffl HCTS244MS Radiation Hardened Octal Buffer/Line Driver, Tri-State December 1992 Features Pinouts • 3 Micron Radiation Hardened SOS CMOS • Total Dose 200K or 1 Mega-RAD SI 20 PIN CERAMIC DUAL-IN-LINE MIL-STD-1835 DESIGNATOR, CDIP2-T20, LEAD FINISH C

or ic 7473 CMOS

Abstract: pin diagram for IC 7473 circuit diagram for IC 7473 ic 7472 pin diagram pin DIAGRAM OF IC 7474 7474 truth table ic 7473 pin diagram pin diagram of ic 7470 ic 7474 pin diagram pin DIAGRAM OF IC 7473
Contextual Info: m HCTS244MS HARRIS S E M I C O N D U C T O R Radiation Hardened Octal Buffer/Line Driver, Tri-State Decem ber 1992 Pinouts Features 20 PIN CERAMIC DUAL-IN-LINE MIL-STD-1835 DESIGNATOR, CDIP2-T20, LEAD FINISH C TOP VIEW • 3 Micron Radiation Hardened SOS CMOS

Contextual Info: HA RR IS S E M I C O N D S E C T O R SfiE ]> • 3 HAS«!? M 3 D 2 27 1 G G 4 4 2 7 A 03b * H A S HCTS244MS Radiation Hardened Octal Buffer/Line Driver, Tri-State D ecem ber 1992 Features Pinouts - r - S L r C T \ 20 PIN CERAMIC DUAL-IN-LINE MIL-STD-1835 DESIGNATOR, CDIP2-T20, LEAD FINISH C

Contextual Info: CY7C1327 256K X 18 Synchronous-Pipelined Cache RAM Features The CY7C1327 I/O pins can operate at either the 2.5V or the 3.3V level, the I/O pins are 3.3V tolerant when V DDQ=2.5V. • Supports 1 0O-MHz bus for Pentium and PowerPC operations with zero wait states

LEAPER-3

Abstract: 74189 7489 sram 4N34 89C51 interfacing with lcd display ic 74192 pin configuration interfacing 20x4 LCD with 89c51 IC 74189 DATA LEAP-U1 LEAPER-10 driver
Contextual Info: COMPANY PROFILE 1 Leap Electronic was established in 1980 located in Taipei Taiwan. With great experienced employees, Leap has dedicated on test equipment and provided a whole and perfect environment of development. Additional, the Company has been qualified by major IC manufacturer such as ATMEL, AMD, MICROCHIP, WINBOND,etc.

Contextual Info: irite T IPBiyiMIDMÄKV 8293 GPIB TRANSCEIVER • Nine Open-collector or Three-state Line Drivers ■ On-chip Decoder for Mode Configuration ■ 48 mA Sink Current Capability on Each Line Driver ■ Power Up/Power Down Protection to Prevent Disrupting the IEEE Bus

VOLTAGE DEPENDENT RESISTOR VDR

Abstract: CI 7473 TEA1064A D413 dpi 510 DIP28 S028 UBA1702 UBA1702A UBA1702AT
Contextual Info: Philips Semiconductors Preliminary specification Line interrupter driver and ringer UBA1702; UBA1702A FEATURES APPLICATIONS Speech part • Telephone sets with software controlled ringer function • Driver for the line interrupter that can be either a PMOST

DIN 41 612 Connectors

Abstract: 09 03 164 6850 harting 09 06 000 6421
Contextual Info: HARTING Connectors DIN 41 612 Page 01.11 Pages 01.12 f Page 01.16 2B Page 01.17 Page 01.18 3B Page 01.19 Pages 01.20 f C Pages 01.22 f Pages 01.28 f 2C Pages 01.30 f Pages 01.32 f 3C Pages 01.34 f Page 01.41 M Page 01.42 M-flat Page 01.43 M invers Pages 01.44 f

d472 TRANSISTOR

Abstract: d472 TRANSISTOR equivalent wd90c10 IMS T414 t410 TRANSISTOR SPB105 K544 80386SX BF311 it235
Contextual Info: WD7910IWD7910LP TABLE OF CONTENTS Section Title 1.0 INTRODUCTION 1.1 Document Scope 1.2 Features 1.3 General Description 1.3.1 WD791 0 1.3.2 WD7910lP 8-1 8-1 8-1 8-2 8-2 8-2 2.0 ARCHITECTURE 2.1 Initialization And Clocking AT Bus . . . . . . . 2.2 2.3 Main Processor Control

ht321

Contextual Info: WESTERN DIGITAL CORP 4bE » • ^710220 GG12fci74 ^ m\ùì>c D A T A SH E E T WD7910, WD7910LP System Controller Devices \ WESTERN DIGITAL 9000-2615 WESTERN DIGITAL CORP HbE » ■ iTiaaaa ooi5b7S □ ■ u k -r-SZ ' 33 -65 Copyright 1991 Western Digital Corporation

interfacing of 8237 with 8086

Abstract: nec v30 8237 interface with 8086 Peripheral block diagram interfacing of memory devices with 8086 V30 CPU vl82c laptop HARD DISK CIRCUIT diagram RD3F OTI-037 02F8-02FF
Contextual Info: OAK TECHNOLOGY INC OTI-031 IBM PS/2 MODEL 30-COMPATIBLE SYSTEM CONTROLLER FEATURES DESCRIPTION • Supports 8086 or V30 CPU speed at 8 MHz or 10 MHz with zero wait state using 150 ns DRAMs The OTI-031 provides the PS/2 Model 30-compatible system with the dual

8237 interface with 8086 Peripheral block diagram

Contextual Info: OAK TECHNOLOGY INC OTI-031 IBM PS/2 MODEL 30-COMPATIBLE SYSTEM CONTROLLER FEATURES DESCRIPTION • Supports 8086 or V30 CPU speed at 8 MHz or 10 MHz with zero wait state using 150 ns DRAMs The OTI-031 provides the PS/2 Model 30-compatible system with the dual

AD7472

Contextual Info: a 1.75MSPS, 4mW 10-Bit/12-Bit Parallel ADC AD7470/72 Preliminary Technical Data FEATURES Specified for VDD of 2.7 V to 5.25 V 1.75MSPS for AD7470 10-Bit 1.5MSPS for AD7472 (12-Bit) Low Power: AD7470:- 3mW typ at 1.75MSPS with 3V Supplies 9mW typ at 1.75MSPS with 5V Supplies