743MW Search Results

SLVS 200

Abstract: MAX1434 MAX1436 MAX1436B MAX1436BECQ-D MAX1437 MAX1438
Contextual Info: 19-0523; Rev 0; 3/06 KIT ATION EVALU E L B AVAILA Octal, 12-Bit, 40Msps, 1.8V ADC with Serial LVDS Outputs Features The MAX1436B octal, 12-bit analog-to-digital converter ADC features fully differential inputs, a pipelined architecture, and digital error correction incorporating a

4270d

Abstract: Hitachi DSA00164
Contextual Info: HM514170D, HM514270D Series HM51S4170D, HM51S4270D Series 262,144-word x 16-bit Dynamic RAM ADE-203-672A Z Rev. 1.0 Jul. 10, 1997 Description The Hitachi HM51(S)4170D Series, HM51(S)4270D Series are CMOS dynamic RAM organized as 262,144-word × 16-bit. HM51(S)4170D Series, HM51(S)4270D Series have realized higher density, higher

SLVS 200

Abstract: MAX1436EVKIT
Contextual Info: 19-3646; Rev 0; 4/05 KIT ATION EVALU E L B A IL AVA Octal, 12-Bit, 40Msps, 1.8V ADC with Serial LVDS Outputs The MAX1436 octal, 12-bit analog-to-digital converter ADC features fully differential inputs, a pipelined architecture, and digital error correction incorporating a

Contextual Info: P4C187/P4C187L ULTRA HIGH SPEED 64K x 1 STATIC CMOS RAMS FEATURES Full CMOS, 6T Cell Data Retention with 2.0V Supply P4C187L Military High Speed (Equal Access and Cycle Times) – 10/12/15/20/25 ns (Commercial) – 12/15/20/25/35 ns (Industrial) – 15/20/25/35/45 ns (Military)

Contextual Info: MITSUBISHI LSIs M 5 M 4 4 1 9 A J , T P , R T - 6 , - 7 , - 8 , - 6 S , - 7 S , - 8 S FAST PAGE MODE 4718592-BIT 262144-WORD BY 18-BIT DYNAMIC RAM DESCRIPTION This is a family of 2 6 2 1 4 4 -word by 18-bit dynamic RAMS, fabricated with the high performance CMOS process, and is

power off delay timer circuit diagram

Abstract: PI2122
Contextual Info: PI2122 Cool-ORing Series 12Amp Active ORing Solution With Load Disconnect Description Features The Cool-ORing PI2122 is a complete full-function Active ORing solution with a high-speed ORing MOSFET controller and a very low on-state resistance Dual MOSFETs designed for use in

Contextual Info: P4C187/P4C187L ULTRA HIGH SPEED 64K x 1 STATIC CMOS RAMS FEATURES Full CMOS, 6T Cell Three-State Output High Speed Equal Access and Cycle Times – 10/12/15/20/25/35/45 ns (Commercial) – 12/15/20/25/35 /45 ns (Industrial) – 15/20/25/35/45/55/70/85 ns (Military)

Contextual Info: b E 4 tì fl ES 0G23bTì IMA • H IT 1 MITSUBISHILSIs M 5 M 4 4 1 9 0 A J ,T P ,R T - 6 ,-7 ,-8 ,-6 S ,- 7 S ,- 8 S FAST PAGE MODE 4718592-BIT 262144-WORD BY 18-BIT DYNAMIC RAM DESCRIPTION This is a family of 262144-word by 18-bit dynamic RAMS, fabricated with the high performance CMOS process, and is

MMCX connector schematic

Abstract: circuit diagram of 4 channel long range RF based frequency hopping spread spectrum S467AH-915S AC4424 AC4486 AC4490 AC4490-1X1
Contextual Info: AC4490 900 MHz OEM TRANSCEIVERS Specifications Subject to Change User’s Manual Version 2.3 11160 THOMPSON AVENUE LENEXA, KS 66219 800 492-2320 www.aerocomm.com wireless@aerocomm.com DOCUMENT INFORMATION Copyright Information Copyright 2005 AEROCOMM, Inc. All rights reserved.

MSM5118160

Abstract: SOJ42
Contextual Info: J2G0152-29-41 作成：1999年 4月 MSM5118160D/DSL l 前回作成：1998年10月 ¡ 電子デバイス MSM5118160D/DSL 1,048,576-Wordx16-Bit DYNAMIC RAM：高速ページモード n 概要 MSM5118160D/DSLはCMOSプロセス技術を用いた1,048,576ワ−ド×16ビット構成のダイナミックラン

22-PIN

Abstract: P4C187 P4C187L
Contextual Info: P4C187/P4C187L ULTRA HIGH SPEED 64K x 1 STATIC CMOS RAMS FEATURES Full CMOS, 6T Cell Data Retention with 2.0V Supply P4C187L Military High Speed (Equal Access and Cycle Times) – 10/12/15/20/25/35/45 ns (Commercial) – 12/15/20/25/35 /45 ns (Industrial)

schottky CST

Abstract: tc5117805
Contextual Info: TOSHIBA TC5117805CJ/CFT/CST-50,-60 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC 2,097,152-WORD BY 8-BIT EDO HYPER PAGE DYNAMIC RAM DESCRIPTION The TC5117805CJ/CFT/CST is an EDO (hyper page) dynamic RAM organized as 2,097,152 words by 8 bits.

24-Pin Plastic DIP

Abstract: smd code WZ P4C187 P4C187L
Contextual Info: P4C187/P4C187L ULTRA HIGH SPEED 64K x 1 STATIC CMOS RAMS FEATURES Full CMOS, 6T Cell Data Retention with 2.0V Supply P4C187L Military High Speed (Equal Access and Cycle Times) – 10/12/15/20/25 ns (Commercial) – 12/15/20/25/35 ns (Industrial) – 15/20/25/35/45 ns (Military)

Contextual Info: 19-0523; Rev 1; 2/11 KIT ATION EVALU E L B A AVAIL Octal, 12-Bit, 40Msps, 1.8V ADC with Serial LVDS Outputs Features The MAX1436B octal, 12-bit analog-to-digital converter ADC features fully differential inputs, a pipelined architecture, and digital error correction incorporating a

SLVS 400

Contextual Info: 19-0523; Rev 1; 2/11 KIT ATION EVALU E L B A AVAIL Octal, 12-Bit, 40Msps, 1.8V ADC with Serial LVDS Outputs Features The MAX1436B octal, 12-bit analog-to-digital converter ADC features fully differential inputs, a pipelined architecture, and digital error correction incorporating a

MSM5118165F

Contextual Info: FEDD5118165F-02 Issue Date: Mar. 23, 2010 MSM5118165F 1,048,576-Word  16-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO DESCRIPTION The MSM5118165F is a 1,048,576-word  16-bit dynamic RAM fabricated in LAPIS Semiconductor’s silicon-gate CMOS technology. The MSM5118165F achieves high integration, high-speed operation,

Contextual Info: 19-3646; Rev 1; 2/11 KIT ATION EVALU LE B A IL A AV Octal, 12-Bit, 40Msps, 1.8V ADC with Serial LVDS Outputs The MAX1436 octal, 12-bit analog-to-digital converter ADC features fully differential inputs, a pipelined architecture, and digital error correction incorporating a

P4C187

Contextual Info: P4C187/P4C187L ULTRA HIGH SPEED 64K x 1 STATIC CMOS RAMS FEATURES Full CMOS, 6T Cell Three-State Output High Speed Equal Access and Cycle Times – 10/12/15/20/25/35/45 ns (Commercial) – 12/15/20/25/35 /45 ns (Industrial) – 15/20/25/35/45/55/70/85 ns (Military)

MAX1436EVKIT

Abstract: MAX1434 MAX1436 MAX1437 MAX1438 SLVS 200 SLVS 400
Contextual Info: 19-3646; Rev 0; 4/05 KIT ATION EVALU E L B A IL AVA Octal, 12-Bit, 40Msps, 1.8V ADC with Serial LVDS Outputs The MAX1436 octal, 12-bit analog-to-digital converter ADC features fully differential inputs, a pipelined architecture, and digital error correction incorporating a

AC4790

Abstract: MMCX connector schematic AC4790-1x1 AC4790-200M kql-ac4490 mw RADIO RECEIVER IC Nearson old radio diagram S467AH-915S Johnson Components 135-3711-822
Contextual Info: AC4790 900 MHz OEM TRANSCEIVERS Specifications Subject to Change User’s Manual Version 1.3 11160 THOMPSON AVENUE LENEXA, KS 66219 800 492-2320 www.aerocomm.com wireless@aerocomm.com 1 DOCUMENT INFORMATION Copyright Information Copyright 2006 AEROCOMM, Inc. All rights reserved.

Contextual Info: P4C187/P4C187L ULTRA HIGH SPEED 64K x 1 STATIC CMOS RAMS SCRAMS FEATURES • Full CMOS, 6T Cell Data Retention with 2.0V Supply (P4C187L Military) ■ High Speed (Equal Access and Cycle Times) -10/12/15/20/25 ns (Commercial) -15/20/25/35 ns (Military) Separate Data I/O

Contextual Info: P4C187/P4C187L ULTRA HIGH SPEED 64K x 1 STATIC CMOS RAMS FEATURES • Full CMOS, 6T Cell Data Retention with 2.0V Supply P4C187L Military ■ High Speed (Equal Access and Cycle Times) -10/12/15/20/25 ns (Commercial) -12/15/20/25/35 ns (Industrial) -15/20/25/35/45 ns (Military)

SOJ42

Abstract: MSM5118165D sl130
Contextual Info: J2G0151-18-X2 作成：1998年10月 ¡ 電子デバイス MSM5118165D/DSL l MSM5118165D/DSL 1,048,576-Wordx16-Bit DYNAMIC RAM：EDO機能付き高速ページモード n 概要 MSM5118165D/DSLはCMOSプロセス技術を用いた1,048,576ワ−ド×16ビット構成のダイナミックラン

MSM5118160F

Abstract: SOJ42-P-400-1
Contextual Info: FEDD5118160F-01 1Semiconductor MSM5118160F This version: August. 2000 Previous version :  1,048,576-Word x 16-Bit DYNAMIC RAM : FAST PAGE MODE TYPE DESCRIPTION The MSM5118160F is a 1,048,576-word × 16-bit dynamic RAM fabricated in Oki’s silicon-gate CMOS