65S303 Search Results

IR 30 D1

Contextual Info: SN74ALS236 64 x 4 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY SDAS107A-OCTOBER 1986 - REVISED SEPTEMBER 1993 Asynchronous Operation Organized as 64 Words by 4 Bits DW OR N PACKAGE TOP VIEW r NC [ 1 Data Rates From 0 to 30 MHz 3-State Outputs 16 J VCC 15 ] S O

LT10711

Contextual Info: LT1071, LT1071HV 2.5-A HIGH-EFFICIENCY SWITCHING REGULATORS D3344, JULY 19B 9-R E V IS E D A U G U S T 1991 Wide Supply-Voltage Range: LT1071HV . . . 3 V to 60 V LT1071 . . . 3 V to 40 V KC AND KV PACKAGE KV Package Used for Illustration (TOP VIEW) Low Quiescent Current. . . 6 mA Typ

TLC2425

Abstract: TLE24251
Contextual Info: TLE2425, TLE2425Y PRECISION VIRTUAL GROUNDS SLOSD65B - MARCH 1991 - REVISED AUGUST 1995 Excellent Regulation Characteristics - Output Regulation -4 5 nV Typ at l0 = 0 to -1 0 mA +15 nV Typ at Iq - 0 to +10 mA - Input Regulation = 1.5 ¿iV/V Typ Low-lmpedance Output. . . 0.007512 Tÿp

D3440

Contextual Info: TLE2027M, TLE2027AM EXCALIBUR LOW-NOISE HIGH-SPEED PRECISION OPERATIONAL AMPLIFIERS D3440, MAY 1990, REVISED OCTOBER 1991 available features Outstanding Combination of DC Precision and AC Performance: Unity-Galn Bandwidth . . . 15 MHz Typ V n_3.3 nV/VHz at f = 10 Hz Typ,

TL14310

Abstract: TL1431C SLVS062B
Contextual Info: TL1431C, TL1431Q, TL1431Y PRECISION PROGRAMMABLE REFERENCES SLVS062B - DECEMBER 1991 - REVISED AUGUST 199S D PACKAGE TOP VIEW 0.4% Initial Voltage Tolerance 0.1-Q Typical Output Impedance Fast Turn O n . . . 500 ns Sink Current Capability. . . 1 mA to 100 mA

26c32c

Abstract: 26C32I
Contextual Info: AM26C32C, AM26C32I QUADRUPLE DIFFERENTIAL LINE RECEIVERS SLLS104B- D3634, DECEMBER 1990-R EV ISE D DECEMBER 1992 Meets EIA Standards RS-422-A, RS-423-A, and CCITT Recommendation V.11 □, N, OR N S t PACKAGE TOP VIEW Low Power, Ice = 9 rnA Typ 1B[ ±7-V Common-Mode Range With ±200-mV

transistor et 455

Contextual Info: TL7702A, TL7705A, TL7709A, TL7712A, TL7715A TL7702AY, TL7705AY, TL7709AY, TL7712AY, TL7715AY SUPPLY VOLTAGE SUPERVISORS SLVS028C - APRIL 1983 - REVISED AUGUST 1995 • Power-On Reset Generator • Automatic Reset Generation After Voltage Drop D, JG, OR P PACKAGE

Contextual Info: S N 74AC T215 7 2K x 16 C A C H E A D D R E S S C O M PA R A TO R /D A TA RAM D3326, JANUARY 1990-REVlSED JUNE 1990 Fast A ddress to Match Delay . . . 20 ns Max FN PACKAGE TOP VIEW Totem -Pole and Open-Drain Match Outputs On-Chip Address/D ata Com parator

Contextual Info: SN54F245, SN74F245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDFS010A- MARCH 1 9 8 7 - REVISED OCTOBER 1993 3-State Outputs Drive Bus Lines Directly Package Options Include Plastic Small-Outline SOIC and Shrink Small-Outline (SSOP) Packages, Ceramic Chip Carriers, and Plastic and Ceramic

Contextual Info: SN54HC253, SN74HC253 DUAL 4-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS WITH 3-STATE OUTPUTS _ SCLS133A-DECEMBER 1982 - REVISED JANUARY 1996 3-State Version of 'HC153 High-Current Inverting Outputs Drive up to 15 LSTTL Loads

TSL216

Contextual Info: TSL216 192 x 1 1NTEGRATED OPTO SENSOR SOESOO6-J U N E 1992 * Contains Three 64-Bit Static Shift Registers * Offers Extendable Data I/O for Expanding the Number of Sensors * * top v ie w Contains Analog Buffer With Sample-andHold for Analog Output Over Full Clock

Contextual Info: SN55116, SN75116 THRU SN75119 DIFFERENTIAL LINE TRANSCEIVERS D 2 1 4 3 . M A Y 1 9 7 6 - R E V IS E D M A Y 1 9 9 0 Features common to all types • Additional features of the S N 5 5 1 1 6 /S N 7 5 1 16 Single 5-V Supply • Independent Driver and Receiver

Contextual Info: SN74ALVC16600 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS S C A S 263- JANUARY 1 9 9 3 - REVISED MARCH 1994 | • Member of the Texas Instruments Widebus Family • UBT™ Universal Bus Transceiver Combines D-Type Latches and D-Type Flip-Flops for Operation In Transparent,

74ALS229

Abstract: D2037 74ALS229B
Contextual Info: SN74ALS229B 1 6 x 5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY D3486, MARCH 1990 DW OR N PACKAGE Independent Asynchronous Inputs and Outputs TOP V IE W OE [ 16 Words by 5 Bits 1 F U L L -2 [ 2 Data Rates From 0 to 40 MHz Fall-Through Time . . . 14 ns Typ FU LL [ 3

Contextual Info: SN74LVC544 OCTAL REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS I SCAS346A - MARCH 1994 - REVISED JULY 1995 DB, DW, OR PW PACKAGE TOP VIEW Typical V q l p (Output Ground Bounce) < 0.8 V at Vc c = 3.3 V, TA = 25°C LEB A[ 1 U [ 2 A1[ 3 A2 [ 4 A3[ 5 A4[ 6 A5 [ 7

TL1723

Abstract: hstnn 199S SN74LVT16835
Contextual Info: SN74LVT16835 3.3-V ABT 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS S C B S 3 0 9 C - M ARCH 1994 - REVISED JULY 1995 DGG OR DL PACK AG E TOP VIEW State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low-Static Power Dissipation

SN74ACT7811

Abstract: SN74ACT7881 SN74ACT7882 SN74ACT7884
Contextual Info: SN74ACT7881 1024 x 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCAS227A- FEBRUARY 1993 - REVISED JUNE 1994 Member of the Texas Instruments Wldebus Family * Input-Ready, Output-Ready, and Half-Full Flags Independent Asynchronous Inputs and Outputs Read and Write Operations Can Be

QS3384

Abstract: QS3L384 SN74CBT3384A
Contextual Info: SN74CBT3384A 10-BIT BUS SWITCH S C D S 004F- NOVEMBER 1992 - REVISED AUGUST 1996 • Functionally Equivalent to QS3384 and QS3L384 DB, DW, OR PW PACKAGE TOP VIEW • 5-i2 Switch Connection Between Two Ports 10 E [ 1 1B1 [ 2 • TTL-Compatible Input and Output Levels

SN74ALVC16260

Abstract: SN74ALVC162601
Contextual Info: SN74ALVC162601 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS S C A S 3 7 6 -M A R C H 1994 Member of the Texas Instruments Widebus Family DGG OR DL PACKAGE CTOP VIEW o eab LEAB A1 GND A2 A3 This 18-bit universal bus transceiver is designed for 2.7-V to 3.6-V V qc operation.

SN54LVT16952

Abstract: LVT16952 SN74LVT16952
Contextual Info: SN54LVT16952, SN74LVT16952 3.3-V ABT 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS _ SCBS151A - MAY 1992 - REVISED JANUARY 1994 State-of-the-Art Advanced BiCMOS Technology ABT Design for 3.3-V Operation and Low-Static Power

SN74ACT7803

Abstract: SN74ACT7805 SN74ACT7813
Contextual Info: SN74ACT7803 512 x 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCAS191 - MARCH 1991 - REVISED MARCH 1992 DL PACKAGE TOP VIEW • Member of the Texas Instruments W id e b u s F a m ily • Free-Running Read and Write Clocks Can Be Asynchronous or Coincident U 56

l31c

Abstract: STO 23-5 Voltage Regulators CSRT-1 GI 312 diode SLVS ST TPS7201 TPS7201Q TPS7233Q TPS7233Y TPS7248Q
Contextual Info: TPS7201Q, TPS7233Q, TPS7248Q, TPS7250Q TPS7201Y, TPS7233Y, TPS7248Y, TPS7250Y MICROPOWER LOW-DROPOUT LDO VOLTAGE REGULATORS SLVS102C - MARCH 1995 - REVISED AUGUST 1995 A vailable in 5-V, 4.85-V, and 3.3-V Fixed-O utput and A d justab le Versions D PACKAGE

TTL 7474

Abstract: 7474 for shift register 7474 shift register 7474 texas instruments ABT8245 SN54ABT8245 SN74ABT8245 tms 3534
Contextual Info: SN54ABT8245, SN74ABT8245 SCAN TEST DEVICES WITH OCTAL BUS TRANSCEIVERS SCBS124A - A UGUS T 1992 - REVI SED AUGUS T 1993 ' Members of the Texas Instruments SCOPE Family of Testability Products 1 Compatible With the IEEE Standard 1149.1-1990 JTAG Test Access Port

LVTH244A

Abstract: SN54LVTH244A SN74LVTH244A
Contextual Info: SN54LVTH244A, SN74LVTH244A 3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS S C A S 586- DECEMBER 1996 SN54LVTH244A . . . J OR W PACKAGE SN74LVTH244A . . . DB, DW, OF PW PACKAGE TOP VIEW) State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V