65LVD Search Results

Contextual Info: DATA TRANSMISSION Backplane Bridging is Easy w ith 65LVDS22 and SN 65LVD M 22 M U X Repeaters 65LVDS22 M U X table ► $311 SN 65LV D M 22 ► $3.84 in quantifias « 1 1 * ilabile in IG-pin SOIC D AT A GLANCE * • High signaling rates 400 Mbps High impedance drivers

Contextual Info: 65LVDS152 MuxIt RECEIVER-DESERIALIZER SLLS445 – DECEMBER 2000 D A Member of the MuxItt Serializer- 65LVDS152DA Marked as 65LVDS152 (TOP VIEW) Deserializer Building-Block Chip Family D Supports Deserialization of One Serial Link D D D D D D D Data Channel Input at Rates up to

A114

Abstract: C101 SN65LVDS150 SN65LVDS151 SN65LVDS152 SN65LVDS152DA
Contextual Info: 65LVDS152 MuxIt RECEIVER-DESERIALIZER SLLS445 – DECEMBER 2000 D A Member of the MuxItt Serializer- 65LVDS152DA Marked as 65LVDS152 (TOP VIEW) Deserializer Building-Block Chip Family D Supports Deserialization of One Serial Link D D D D D D D Data Channel Input at Rates up to

65LVDS150

Contextual Info: 65LVDS150 MuxIt PLL FREQUENCY MULTIPLIER SLLS443 – DECEMBER 2000 D D D D D D D D D D 65LVDS150 PW PACKAGE Marked as 65LVDS150 A Member of the MuxIt SerializerDeserializer Building-Block Chip Family Pin Selectable Frequency Multiplier Ratios Between 4 and 40

Contextual Info: 65LVDS150 MuxIt PLL FREQUENCY MULTIPLIER SLLS443 – DECEMBER 2000 D D D D D D D D D D 65LVDS150 PW PACKAGE Marked as 65LVDS150 A Member of the MuxIt SerializerDeserializer Building-Block Chip Family Pin Selectable Frequency Multiplier Ratios Between 4 and 40

Contextual Info: 65LVDS150 MuxIt PLL FREQUENCY MULTIPLIER SLLS443 – DECEMBER 2000 D D D D D D D D D D 65LVDS150 PW PACKAGE Marked as 65LVDS150 A Member of the MuxIt SerializerDeserializer Building-Block Chip Family Pin Selectable Frequency Multiplier Ratios Between 4 and 40

SN65LVDS150

Abstract: A114 C101 SN65LVDS151 SN65LVDS152 SN65LVDS152DA
Contextual Info: 65LVDS152 MuxIt RECEIVER-DESERIALIZER SLLS445 – DECEMBER 2000 D A Member of the MuxItt Serializer- 65LVDS152DA Marked as 65LVDS152 (TOP VIEW) Deserializer Building-Block Chip Family D Supports Deserialization of One Serial Link D D D D D D D Data Channel Input at Rates up to

C101

Abstract: SN65LVDS150 SN65LVDS151 SN65LVDS152
Contextual Info: 65LVDS150 MuxIt PLL FREQUENCY MULTIPLIER SLLS443 – DECEMBER 2000 D D D D D D D D D D 65LVDS150 PW PACKAGE Marked as 65LVDS150 A Member of the MuxIt SerializerDeserializer Building-Block Chip Family Pin Selectable Frequency Multiplier Ratios Between 4 and 40

C101

Abstract: SN65LVDS150 SN65LVDS151 SN65LVDS152
Contextual Info: 65LVDS150 MuxIt PLL FREQUENCY MULTIPLIER SLLS443 – DECEMBER 2000 D D D D D D D D D D 65LVDS150 PW PACKAGE Marked as 65LVDS150 A Member of the MuxIt SerializerDeserializer Building-Block Chip Family Pin Selectable Frequency Multiplier Ratios Between 4 and 40

A114

Abstract: C101 SN65LVDS150 SN65LVDS151 SN65LVDS152 SN65LVDS152DA
Contextual Info: 65LVDS152 MuxIt RECEIVER-DESERIALIZER SLLS445 – DECEMBER 2000 D A Member of the MuxItt Serializer- 65LVDS152DA Marked as 65LVDS152 (TOP VIEW) Deserializer Building-Block Chip Family D Supports Deserialization of One Serial Link D D D D D D D Data Channel Input at Rates up to

Contextual Info: 65LVDS152 MuxIt RECEIVER-DESERIALIZER SLLS445 – DECEMBER 2000 D A Member of the MuxItt Serializer- 65LVDS152DA Marked as 65LVDS152 (TOP VIEW) Deserializer Building-Block Chip Family D Supports Deserialization of One Serial Link D D D D D D D Data Channel Input at Rates up to

Contextual Info: SN55LVDS32, 65LVDS32, 65LVDS3486, 65LVDS9637 HIGH-SPEED DIFFERENTIAL LINE RECEIVERS SLLS262I – JULY 1997 – REVISED SEPTEMBER 2000 The intended application of these devices and signaling technique is both point-to-point and multidrop one driver and multiple receivers data

Contextual Info: SN55LVDS32, 65LVDS32 65LVDS3486, 65LVDS9637 www.ti.com SLLS262Q – JULY 1997 – REVISED JULY 2007 HIGH-SPEED DIFFERENTIAL LINE RECEIVERS The intended application of these devices and signaling technique is both point-to-point and multidrop one driver and multiple receivers data

Contextual Info: 65LVDS100, 65LVDT100 65LVDS101, 65LVDT101 www.ti.com SLLS516C – AUGUST 2002 – REVISED JUNE 2004 DIFFERENTIAL TRANSLATOR/REPEATER FEATURES • • • • • • • • • DESCRIPTION Designed for Signaling Rates ≥ 2 Gbps Total Jitter < 65 ps

LVDS31

Abstract: DK638 AM26LS31 MC3487 SN55LVDS31 SN65LVDS31 SN65LVDS3487 SN65LVDS9638
Contextual Info: SN55LVDS31, 65LVDS31, 65LVDS3487, 65LVDS9638 HIGH-SPEED DIFFERENTIAL LINE DRIVERS SLLS261I – JULY 1997 – REVISED JUNE 2001 The SN55LVDS31, 65LVDS31, 65LVDS3487, and 65LVDS9638 are differential line drivers that implement the electrical characteristics of low-voltage differential

LVDS100

Abstract: MC100EP16 SN65LVDS100 SN65LVDS100D SN65LVDS100DGK SN65LVDS101 SN65LVDT100 SN65LVDT100D SN65LVDT101
Contextual Info: 65LVDS100, 65LVDT100 65LVDS101, 65LVDT101 www.ti.com SLLS516B − AUGUST 2002 − REVISED SEPTEMBER 2003 DIFFERENTIAL TRANSLATOR/REPEATER FEATURES D Designed for Signaling Rates 1 . 2 Gbps D Total Jitter < 65 ps D Low-Power Alternative for the MC100EP16

Contextual Info: 65LVDS93 N-LINK TRANSMITTER S LLS 302A - MAY 1998 - R EVISED N O VEM BE R 1998 • • • • • • • • • • • • • • 28:4 Data Channel Compression at up to 1.82 Gigabits per Second Throughput Suited for Point-to-Point Subsystem Communication With Very Low EMI

Contextual Info: SN55LVDS31, 65LVDS31 65LVDS3487, 65LVDS9638 www.ti.com SLLS261L – JULY 1997 – REVISED JULY 2007 HIGH-SPEED DIFFERENTIAL LINE DRIVERS DESCRIPTION The SN55LVDS31, 65LVDS31, 65LVDS3487, and 65LVDS9638 are differential line drivers that implement the electrical characteristics of low-voltage

SN65LVDS151

Abstract: A114 C101 SN65LVDS150 SN65LVDS151DA SN65LVDS152
Contextual Info: 65LVDS151 MuxIt SERIALIZER-TRANSMITTER SLLS444A – DECEMBER 2000 D A Member of the MuxIt  D D D D D D D D 65LVDS151DA Serializer-Deserializer Building-Block Chip Family Supports Serialization of up to 10 Bits of Parallel Data Input at Rates up to 200 Mbps

Contextual Info: 65LVDS95ĆQ1 LVDS SERDES TRANSMITTER SGLS207A − OCTOBER 2003 − REVISED MAY 2008 DGG PACKAGE TOP VIEW D Qualified for Automotive Applications D 21:3 Data Channel Compression at up to 1.36 Gigabits per Second Throughput D4 VCC D5 D6 GND D7 D8 VCC D9

SN75LVDS81

Contextual Info: 65LVDS86A-Q1 SLLS768A – AUGUST 2006 – REVISED JANUARY 2012 www.ti.com FlatLink RECEIVER Check for Samples: 65LVDS86A-Q1 FEATURES 1 • 2 • • • • • • • • • • • • 3:21 Data Channel Expansion at up to 178.5 Mbytes/s Throughput

dl048a

Abstract: DS90LV048A LVDS048A SN65LVDS048A SN65LVDS048AD SN65LVDS048APW
Contextual Info: 65LVDS048A LVDS QUAD DIFFERENTIAL LINE RECEIVER SLLS451B– SEPTEMBER 2000 – REVISED SEPTEMBER 2002 D >400 Mbps 200 MHz Signaling Rates D Flow-Through Pinout Simplifies PCB D D D D D D D D D D D D Layout 50 ps Channel-to-Channel Skew (Typ) 200 ps Differential Skew (Typ)

Contextual Info: 65LVDS151 MuxIt SERIALIZER-TRANSMITTER SLLS444A – DECEMBER 2000 D A Member of the MuxIt  D D D D D D D D 65LVDS151DA Serializer-Deserializer Building-Block Chip Family Supports Serialization of up to 10 Bits of Parallel Data Input at Rates up to 200 Mbps

Contextual Info: SN55LVDS32, 65LVDS32 65LVDS3486, 65LVDS9637 www.ti.com SLLS262N – JULY 1997 – REVISED MARCH 2004 HIGH-SPEED DIFFERENTIAL LINE RECEIVERS The SN55LVDS32, 65LVDS32, 65LVDS3486, and 65LVDS9637 are differential line receivers that implement the electrical characteristics of