624MS Search Results

lfxp2-40e

Abstract: LVCMOS25 LD48 LFXP2-17E-5FTN256C HB1004 ispLEVER project Navigator route place LFXP2-5E-5QN IPUG35 LFXP2-8E
Contextual Info: LatticeXP2 Family Handbook HB1004 Version 02.9, May 2011 LatticeXP2 Family Handbook Table of Contents May 2011 Section I. LatticeXP2 Family Data Sheet Introduction Features . 1-1

500C

Abstract: EMC2300 EMC2300-AZC EMC2300-AZC-TR MO-137
Contextual Info: EMC2300 Fan Control Device with High Frequency PWM and Temperature Monitors PRODUCT FEATURES „ „ „ Datasheet 3.3 Volt Operation 5 Volt Tolerant Input Buffers SMBus 2.0 Compliant Interface (Fixed, not Discoverable) with Three Slave Address Options Fan Control

Contextual Info: EMC6D103S Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features PRODUCT FEATURES • ■ ■ Datasheet 3.3 Volt Operation 5 Volt Tolerant Input Buffers SMBus 2.0 Compliant Interface (Fixed, not Discoverable) with Three Slave Address Options

Contextual Info: EMC2300 Fan Control Device with High Frequency PWM and Temperature Monitors PRODUCT FEATURES ̈ ̈ ̈ Datasheet 3.3 Volt Operation 5 Volt Tolerant Input Buffers SMBus 2.0 Compliant Interface (Fixed, not Discoverable) with Three Slave Address Options Fan Control

MB86065

Abstract: M15N10
Contextual Info: Datasheet September 2007 Version 1.01 MB86065 FME/MS/DAC80S/DS/5344 14-bit 1+GSa/s DAC The Fujitsu MB86065 is a 14-bit 1+GSa/s digital to analog converter DAC , delivering exceptional dynamic performance and backwards compatibility with ‘DAC A’ of the MB86064. The

MB86064

Abstract: MB86064PB-G AA15 AA17 AA19 AB16 94088347 M15N10 DK860
Contextual Info: Datasheet October 2005 Version 1.2 MB86064 FME/MS/DAC80/DS/4972 Dual 14-bit 1GSa/s DAC The Fujitsu MB86064 is a Dual 14-bit 1GSa/s digital to analog converter DAC , delivering exceptional dynamic performance. Each high performance DAC core is capable of generating

500C

Abstract: EMC6D102 EMC6D102-CZC EMC6D102-CZC-TR Tachometer circuit 3032h
Contextual Info: EMC6D102 Fan Control Device with Hardware Monitoring and Acoustic Noise Reduction Features PRODUCT FEATURES „ „ „ Datasheet 3.3 Volt Operation 5 Volt Tolerant Input Buffers SMBus 2.0 compliant interface (Fixed, Not Discoverable) With Three Slave Address Options

ISA CODE VHDL

Abstract: 16x4 ram VERILOG IPUG35
Contextual Info: LatticeXP2 Family Handbook HB1004 Version 02.3, January 2009 LatticeXP2 Family Handbook Table of Contents January 2009 Section I. LatticeXP2 Family Data Sheet Introduction Features . 1-1

SMBus Specification V2.0

Abstract: digital tachometer EMC61D100-DK EMC61D101-CK EMC6D100 EMC6D101 EMC6D102
Contextual Info: EMC6D100/EMC6D101* Environmental Monitoring and Control Device with Automatic Fan Capability *NOTE: The EMC6D101 is not recommended for new designs. The EMC6D102 Fan Control Device with Hardware Monitoring and Acoustic Noise Reduction Features is the replacement device recommended for new designs.

vhdl code for frequency divider

Abstract: crc verilog code 16 bit vhdl code for Clock divider for FPGA 304M TN1141 TN1130 2679S
Contextual Info: LatticeXP2 Soft Error Detection SED Usage Guide September 2009 Technical Note TN1130 Introduction Soft errors occur when high-energy charged particles alter the stored charge in a memory cell in an electronic circuit. The phenomenon first became an issue in DRAM, requiring error detection and correction for large memory

LFXP2-5E-5QN208C

Abstract: ld33 LFXP2-5E-5M132C XP2 LFXP2-5E-5QN208C LD33 F LFXP2-5E lfxp2-8E lattice xp2 LFXP2-8E-5QN208C IPUG35
Contextual Info: LatticeXP2 Family Handbook HB1004 Version 02.4, May 2009 LatticeXP2 Family Handbook Table of Contents May 2009 Section I. LatticeXP2 Family Data Sheet Introduction Features . 1-1

Contextual Info: EMC6D103 Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features Product Features • ■ ■ Datasheet 3.3 Volt Operation 5 Volt Tolerant Input Buffers SMBus 2.0 Compliant Interface (Fixed, not Discoverable) with Three Slave Address Options

tachometer adc

Abstract: 500C EMC6D103S EMC6D103S-CZC EMC6D103S-CZC-TR
Contextual Info: EMC6D103S Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features PRODUCT FEATURES „ „ „ Datasheet 3.3 Volt Operation 5 Volt Tolerant Input Buffers SMBus 2.0 Compliant Interface (Fixed, not Discoverable) with Three Slave Address Options

500C

Abstract: EMC6D103 EMC6D103-CK EMC6D103-CK-TR EMC6D103-CZC EMC6D103-CZC-TR CIRCUIT DIAGRAM OF FAN REGULATOR
Contextual Info: EMC6D103 Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features Product Features • ■ ■ Datasheet 3.3 Volt Operation 5 Volt Tolerant Input Buffers SMBus 2.0 Compliant Interface (Fixed, not Discoverable) with Three Slave Address Options

SMBus Specification V2.0

Abstract: 500C EMC6D103 EMC6D103-CK EMC6D103-CK-TR EMC6D103-CZC EMC6D103-CZC-TR
Contextual Info: EMC6D103 Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features PRODUCT FEATURES • ■ ■ Datasheet 3.3 Volt Operation 5 Volt Tolerant Input Buffers SMBus 2.0 Compliant Interface (Fixed, not Discoverable) with Three Slave Address Options

mb86064

Abstract: OSERDES AA15 AA17 AA19 AB16 xilinx digital Pre-distortion 0X0000002 pre-distortion xilinx MB86064PB-G
Contextual Info: Datasheet MB86064 September 2010 Version 1.3 Dual 14-bit 1GSa/s DAC FME/MS/DAC80/DS/4972 The Fujitsu MB86064 is a Dual 14-bit 1GSa/s digital to analog converter DAC , delivering exceptional dynamic performance. Each high performance DAC core is capable of generating

ICS17XX

Abstract: HC6805 Semitec AT103 SeMitec Ishizuka Electronics Galaxy Power 1702 68HC705 equivalent 68HC05 68HC705 ICS1702 QSC1702MOT
Contextual Info: QSC1702-MOT 68HRC05 QuickSaver Battery Charge Control Software Core for Motorola's 8-bit 68HRC705JJ7/JJ6 Microcontrollers Standard Features T T T T T T T T T Ideal for embedded NiMH/NiCd designs 12 bit ADC Cost effective for charger stand designs External resistor set oscillator

LFXP2_8E_5FT256C

Abstract: ld33 LD33 V LD33 e LD41 lfxp2-8E LFXP2-8E-6FT256C verilog code for correlator LVCMOS25 3 tap fir filter based on mac vhdl code
Contextual Info: LatticeXP2 Family Handbook HB1004 Version 02.5, February 2010 LatticeXP2 Family Handbook Table of Contents February 2010 Section I. LatticeXP2 Family Data Sheet Introduction Features . 1-1

Contextual Info: EMC6D103 Fan Control Device with High Frequency PWM Support and Hardware Monitoring Features PRODUCT FEATURES ̈ ̈ ̈ Datasheet 3.3 Volt Operation 5 Volt Tolerant Input Buffers SMBus 2.0 Compliant Interface (Fixed, not Discoverable) with Three Slave Address Options

Contextual Info: EMC2300 Fan Control Device with High Frequency PWM and Temperature Monitors PRODUCT FEATURES • ■ ■ Datasheet 3.3 Volt Operation 5 Volt Tolerant Input Buffers SMBus 2.0 Compliant Interface (Fixed, not Discoverable) with Three Slave Address Options Fan Control

255PWM

Abstract: 500C EMC2300 EMC2300-AZC EMC2300-AZC-TR MO-137
Contextual Info: EMC2300 Fan Control Device with High Frequency PWM and Temperature Monitors PRODUCT FEATURES „ „ „ Datasheet 3.3 Volt Operation 5 Volt Tolerant Input Buffers SMBus 2.0 Compliant Interface (Fixed, not Discoverable) with Three Slave Address Options Fan Control

Contextual Info: Datasheet MB86064 May 2011 Version 1.4 Dual 14-bit 1GSa/s DAC FME/MS/DAC80/DS/4972 The Fujitsu MB86064 is a Dual 14-bit 1GSa/s digital to analog converter DAC , delivering exceptional dynamic performance. Each high performance DAC core is capable of generating

dqs detect

Abstract: verilog code pipeline ripple carry adder PLC programming toshiba t1 lattice xp2-5e DOB80
Contextual Info: LatticeXP2 Family Handbook HB1004 Version 03.2, January 2012 LatticeXP2 Family Handbook Table of Contents January 2012 Section I. LatticeXP2 Family Data Sheet Introduction Features . 1-1

Contextual Info: Datasheet MB86065 May 2011 Version 1.1 14-bit 1+GSa/s DAC FME/MS/DAC80S/DS/5344 The Fujitsu MB86065 is a 14-bit 1+GSa/s digital to analog converter DAC , delivering exceptional dynamic performance and backwards compatibility with ‘DAC A’ of the MB86064.