AT91SAM7XC128
Abstract: AT91SAM7XC256 AT91SAM7XC512 ISO7816 aes 128 algorithm object code
Contextual Info: Features • Incorporates the ARM7TDMI ARM® Thumb® Processor • • • • • • • • • • – High-performance 32-bit RISC Architecture – High-density 16-bit Instruction Set – Leader in MIPS/Watt – EmbeddedICE In-circuit Emulation, Debug Communication Channel Support
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32-bit16-bitat91sam7xc512at91sam7xc256+5at91sam7xc1286209ds17-feb-09iso7816aes 128 algorithm object code
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Contextual Info: Features • Incorporates the ARM7TDMI ARM® Thumb® Processor • • • • • • • • • • – High-performance 32-bit RISC Architecture – High-density 16-bit Instruction Set – Leader in MIPS/Watt – EmbeddedICE In-circuit Emulation, Debug Communication Channel Support
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32-bit16-bitat91sam7xc512at91sam7xc256+3at91sam7xc1286209ds17-feb-09
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1352B
Abstract: AT91SAM7XC128 AT91SAM7XC256 AT91SAM7XC512 ISO7816 digital object counter aes 128 algorithm object code
Contextual Info: Features • Incorporates the ARM7TDMI ARM® Thumb® Processor • • • • • • • • • • – High-performance 32-bit RISC Architecture – High-density 16-bit Instruction Set – Leader in MIPS/Watt – EmbeddedICE In-circuit Emulation, Debug Communication Channel Support
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32-bit16-bitat91sam7xc512at91sam7xc256+7at91sam7xc1286209ds17-feb-091352biso7816digital object counteraes 128 algorithm object code
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AT91SAM7XC256B-AU
Abstract: atmel 0740 AT91SAM7XC128 AT91SAM7XC256 AT91SAM7XC512 ISO7816 atmel 841 aes 128 algorithm object code
Contextual Info: Features • Incorporates the ARM7TDMI ARM® Thumb® Processor • • • • • • • • • • – High-performance 32-bit RISC Architecture – High-density 16-bit Instruction Set – Leader in MIPS/Watt – EmbeddedICE In-circuit Emulation, Debug Communication Channel Support
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32-bit16-bitat91sam7xc512at91sam7xc256+8at91sam7xc1286209ds17-feb-09at91sam7xc256b-auatmel 0740iso7816atmel 841aes 128 algorithm object code
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