6114 RAM Search Results

Contextual Info: ECX-6114-27.000M RoHS Pb PLEASE NOTE: Due to the inherent proprietary nature of custom part numbers, certain parameters are intentionally excluded from this specification sheet. ECX-6114 -27.000M Series Ecliptek Custom Crystal Nominal Frequency 27.000MHz ELECTRICAL SPECIFICATIONS

Contextual Info: ECX-6114-27.000M TR RoHS Pb PLEASE NOTE: Due to the inherent proprietary nature of custom part numbers, certain parameters are intentionally excluded from this specification sheet. ECX-6114 -27.000M TR Series Ecliptek Custom Crystal Packaging Options Tape & Reel

128 half-size alphanumeric characters and symbols

Abstract: KSD 302 KSD1 140 4027 ram KSD 303 7 segment display 2003 cc ksd 302 transistor KSD1 105 TRANSISTOR c 5578 B KSD1 65
Contextual Info: HD66732 Graphics Liquid Crystal Display Controller/Driver Supporting JIS Level-1 and Level-2 Kanji ROM Rev 1.0 Jun. 1st, 1998 Description The HD66732 is a dot-matrix liquid crystal display (LCD) controller and driver LSI that displays 11-by-12 dot Japanese characters consisting of kanji and hiragana according to the Japanese Industrial Standard (JIS)

hitec 4678

Abstract: KSD 303 CS 20A TRANSISTOR ECG 377 ksd 168 ksd 301 TRANSISTOR c 5578 B transistor c 5855 Nippon capacitors 6114
Contextual Info: HD66732 Graphics Liquid Crystal Display Controller/Driver Supporting JIS Level-1 and Level-2 Kanji ROM ADE-207-314(Z) Rev 1.2 Aug, 1999 Description The HD66732 is a dot-matrix liquid crystal display (LCD) controller and driver LSI that displays 11-by-12

oei 6134

Abstract: 6125A OPTICAL ELECTRONICS passive sonar block diagram projector dc dc converter circuit sonar block diagram 6280 camera "optical electronics" composite rotator
Contextual Info: OPTICAL ELECTRONICS INC DhE D g b7^3flt. QDOlfiflE 4 | T - 7 3 -v ; ~ 6125A DATA AND SPECIFICATIONS DESCRIPTION AND INSTRUCTIONS Optical Electronics Incorporated ANALOG IMAGE ROTATOR FEATURES APPLICATIONS . 360° ROTATION . FREQUENCY RESPONSE 500KHz • IMAGE ROTATION

dbl 2052

Abstract: ba 5839 fp sj 2252 ba 5839 fb KSD 302 SCR 131- 6 WJ 66 SCR 131- 6 WJ 60 BR 5254 SCR 131- 6 WJ 69 KL SN 102 lcd
Contextual Info: HD66732 Graphics Liquid Crystal Display Controller/Driver Supporting JIS L evel-1 and Level-2 Kanji ROM HITACHI Rev 1.0 Jun. 1st, 1998 Description T he H D 66732 is a dot-m atrix liquid crystal display (LC D ) controller and driv er LSI that displays 1 l-b y -1 2

b1415

Abstract: N5244A MARKING W63
Contextual Info: Agilent N5244A and N5245A 2-Port and 4-Port PNA-X Microwave Network Analyzers 10 MHz - 43.5 GHz (10 MHz - 50 GHz) Service Guide Agilent Technologies Notices Agilent Technologies, Inc. 2010 - 2013 Manual Part Number No part of this manual may be reproduced

INA-10386

Contextual Info: What H E W L E T T * mLliMPACKARD Low N oise, Cascadable Silicon Bipolar MMIC Amplifier Technical Data INA-10386 Features • Cascadable 50 Q. Gain Block • 3 dB Bandwidth: DC to 1.8 GHz • 26 dB Typical Gain at 1.5 GHz • 10 dBm Typical PldB at 1.5 GHz

HM1-6561-9

Abstract: HM1-6561B-9 HM-6561-9 HM-6561 HM-6561B-9 hM1-6561
Contextual Info: HM-6561 S E M I C O N D U C T O R 256 x 4 CMOS RAM March 1997 Features Description • Low Power Standby . . . . . . . . . . . . . . . . . . . . 50µW Max The HM-6561 is a 256 x 4 static CMOS RAM fabricated using self-aligned silicon gate technology. Synchronous circuit design techniques are employed to achieve high performance and low power operation.

Pulse Width Modulator

Abstract: UC1573
Contextual Info: UC1573 UC2573 UC3573 H IN T E G R A T E D C IR C U IT S UNITRQDE Buck Pulse Width Modulator Stepdown Voltage Regulator ADVANCED INFORMATION FEATURES DESCRIPTION • The UC1573 is a Buck pulse width modulator which steps down and regu­ lates a positive input voltage. The chip is optimized for use in a single

6561

Abstract: 6561 IC
Contextual Info: HM-6561 HARRIS S E M I C O N D U C T O R 256 x 4 CMOS RAM March 1997 Features Description • Low Power Standby. 50|iW Max The HM-6561 is a 256 x 4 static CMOS RAM fabricated using self-aligned silicon gate technology. Synchronous cir­

Turbo decoder Xilinx

Abstract: Turbo Decoder lte turbo encoder xilinx lte TURBO decoder LTE Turbo decoder XILINX,ISE XMP020 turbo encoder design using xilinx design of lte turbo encoder xilinx TURBO decoder
Contextual Info: 3GPP LTE Turbo Decoder v2.0 XMP020 June 24, 2009 Product Brief Introduction General Description The Turbo Convolution Code TCC decoder core is used in conjunction with a TCC encoder to provide an extremely effective way of transmitting data reliably over noisy data channels. The TCC decoder is designed

Contextual Info: m HARIRIS U U HM-6504/883 S E M I C O N D U C T O R 4096 x 1 CMOS RAM February 1992 Features Description • This Circuit is Processed in Accordance to Mii-Std883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1. The HM-6504/883 is a 4096 x 1 static CMOS RAM

Contextual Info: paraugm PDM44058 64K x 18 Fast CMOS Synchronous Static RAM with Interleaved Burst Counter and Output Register Features Description • T h e PDM 44058 is a 1,179,648 b it syn chronous ran­ Interfaces directly with the x86 and Pentium microprocessors 100, 80, 66, 60, 50 M H z

10MHZ

Abstract: AN-1150 AN-1151 AN-1153 AN-1154 AN-1161 COP8 FLASHWIN
Contextual Info: National Semiconductor Application Note 1150 Wallace Ly March 2001 ABSTRACT This application note describes the COP8 In System Programming ISP Software. ISP method of programming the flash memory are thoroughly discussed. simplified block diagram. The factory installed ISP that uses

10MHZ

Abstract: AN-1150 AN-1151 AN-1153 AN-1154 AN-1161 cop8 "flash memory"
Contextual Info: National Semiconductor Application Note 1150 Wallace Ly April 2000 ABSTRACT This application note describes the COP8 In System Programming ISP Software. ISP method of programming the flash memory are thoroughly discussed. simplified block diagram. The factory installed ISP that uses

BCAB40

Contextual Info: National Semiconductor Application Note 1150 Wallace Ly December 2000 ABSTRACT This application note describes the COP8 In System Programming ISP Software. ISP method of programming the flash memory are thoroughly discussed. simplified block diagram. The factory installed ISP that uses

Contextual Info: SEC jUfPD424258 262,144 X 4-Bit Dynamic CMOS RAM NEC Electronics Inc. Description Pin Configurations The fiPD424258 is a static-column dynamic RAM orga­ nized as 262,144 words by 4 bits and designed to operate from a single +5-volt power supply. Advanced polycide

uPD424258

Contextual Info: NEC JIPD424258 262,144 X 4-Bit Dynamic CMOS RAM NEC Electronics Inc. Description Pin Configurations The /iP D 424 258 is a static-colum n d ynam ic RAM orga­ 20-Pin Plastic DIP nized as 262,144 words by 4 bits and designed to op erate from a single + 5 -v o lt power supply. Advanced polycide

LTS-540A

Abstract: 546AR 547AR LTS 546AP 546A LTS-547A
Contextual Info: T A I W A N LI TO N E L E C T R O N I C 24E » 00 355 47 O O O O b b G LTS-540A SERIES Ö T W /-3 3 ^ 0.52" SINGLE DIGIT NUMERIC DISPLAYS SPECIALIST FEATURES • 0.52 INCH 13,2mm D IG IT HEIGHT. • CONTINUOUS UNIFORM SEGM ENTS. • CHOICE OF S IX BRIGH T COLO RS-RED /BRIGHT

ICL7103

Abstract: two digit common anode multiplexed 7-segment display 7 SEGMENT DISPLAY basic CIRCUIT icm 6116 alphanumeric 7 segment display two digit cathode 7-segment decoder NEC Vacuum Fluorescent Display BCD to 7segment decoder common anode 7-segment display 10 pins pin configuration for common cathode 7 segment to latch
Contextual Info: ICM7235 Four Digit Non-Multiplexed Vacuum Fluorescent Display Decoder-Dri vers F EA T U R ES DESCRIPTION • 28 high voltage segment drivers provide four 7-segment digits The ICM7235 fam ily o f display driver circuits provides the user w ith a single chip interface between digital logic or

Contextual Info: Preliminary & Advanced Micro Devices Am29C676 11-Bit DRAM Driver DISTINCTIVE CHARACTERISTICS • ■ ■ ■ ■ ■ Ideal for driving the eleven address lines of 4 Mbit x 1 and 4 Mbit x 4 DRAMs Capable of driving multiple RAS, CAS and WE control lines Drive capability from 50 pF through 500 pF with

Contextual Info: HM-6504/883 HARRIS S E M I C O N D U C T O R February 1992 4096 X 1 C M O S R AM Features Description • This Circuit is Processed in Accordance to Mil-Std883 and Is Fully Conform ant Under the Provisions of Paragraph 1.2.1. • Low Power S tandby. 125|iW Max.

MB87017A

Abstract: 20milliseconds
Contextual Info: FUJITSU D T M F R E C E IV E R MB87017A August 1988 Editon 2.0 DUAL TONE MULTI-FREQUENCY RECEIVER The Fujitsu MB87017A Is a single-chlp Dual Ton Multi-Frequency DTMF receiver th a t detects and decodes 16 DTMF tone pairs and provides a 4 -b it hexadecimal code output fo r each pair. The DTMF receiver features low power