5T2010 Search Results

A17R-A0R

Abstract: A17L-A0L 7144
Contextual Info: HIGH-SPEED 1.8V 256/128K x 36 IDT70P3519/99 SYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V/2.5V/1.8V INTERFACE Features: ◆ ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location Low Power High-speed data access

IDT70T3319

Abstract: IDT70T3399
Contextual Info: HIGH-SPEED 2.5V 512/256/128K X 18 IDT70T3339/19/99S SYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE Š Features: ◆ ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed data access

IDT70T3589

Abstract: IDT70T3599 70T359 70T3589
Contextual Info: HIGH-SPEED 2.5V 256/128/64K x 36 IDT70T3519/99/89S SYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE Features: ◆ ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed data access

70T3589

Contextual Info: HIGH-SPEED 2.5V 256/128/64K x 36 IDT70T3519/99/89S SYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE Features: ◆ ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed data access

Contextual Info: 5T2010 2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK INDUSTRIAL TEMPERATURE RANGE 5T2010 2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK FEATURES: • • • • • • • • • • • • • • DESCRIPTION: 2.5 VDD 5 pairs of outputs Low skew: 50ps same pair, 100ps all outputs

5652

Abstract: IDT70T3319 IDT70T3399 A18R
Contextual Info: HIGH-SPEED 2.5V 512/256/128K X 18 IDT70T3339/19/99S SYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE Š Features: ◆ ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed data access

AN237

Abstract: IDT5T2010
Contextual Info: 5T2010 2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK INDUSTRIAL TEMPERATURE RANGE 5T2010 2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK FEATURES: DESCRIPTION: • • • • • • • • • • • • • • The 5T2010 is a 2.5V PLL clock driver intended for high performance computing and data-communications applications. The 5T2010

PEAK tray drawing

Abstract: 12C-1313-119 daewon 89HPES4T4ZBBCGI TRAY MPPO DAEWON tray drawing PBGA144 daewon tray 72T1 PBGA-144
Contextual Info: Integrated Device Technology, Inc. 6024 Silver Creek Valley Road, San Jose, CA 95138 PRODUCT/PROCESS CHANGE NOTICE PCN PCN #: TB0908-03 DATE: 9/16/2009 Product Affected: 13 mm x 13 mm PBGA-144 & 13 mm x 13 mm CABGA-144 Date Effective: Contact: Title: Phone #:

49fct3805a

Abstract: 40 MHZ OSCILLATOR 49FCT805CT 5v927 74FCT88915TT70 74FCT3807D oscillator 2.048 mhz 5T9306 49FCT805BT 32 MHZ OSCILLATOR
Contextual Info: IDT Clock Management PRODUCT FAMILY and the new LVDS clock fanout family, as well as the IDT Precision and Stratum WAN PLL clock generators. Advanced Clock Management — On Time, All the Time The IDT comprehensive portfolio of Clock Management products enhances time to

A14L

Abstract: IDT70T3539M A18R 70T3539M
Contextual Info: HIGH-SPEED 2.5V 512K x 36 SYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE Features: ◆ ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed data access – Commercial: 3.6ns 166MHz /4.2ns (133MHz)(max.)

70T3539M

Contextual Info: HIGH-SPEED 2.5V 512K x 36 SYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE Features: ◆ ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed data access – Commercial: 3.6ns 166MHz /4.2ns (133MHz)(max.)

A14L

Abstract: IDT70T3539M 70T3539M
Contextual Info: HIGH-SPEED 2.5V 512K x 36 SYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE Features: ◆ ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed data access – Commercial: 3.6ns 166MHz /4.2ns (133MHz)(max.)

MT 5388 BGA

Abstract: Broadcom 7019 BTS 6000 ericsson alcatel 1511 mux mobile switching center msc ericsson bts 6000 2x4 TTL demultiplexer cisco 2801 ericsson bts Technical specification alcatel 1511
Contextual Info: IDT Product Selector Guide Accelerated Thinking SM Table of Contents Integrated Processors Flow-Control Management Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13

IDT70T3589

Abstract: IDT70T3599 70T3589
Contextual Info: HIGH-SPEED 2.5V 256/128/64K x 36 IDT70T3519/99/89S SYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE Features: ◆ ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed data access

IDT5T2010

Contextual Info: 5T2010 2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK INDUSTRIAL TEMPERATURE RANGE 5T2010 2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK FEATURES: • • • • • • • • • • • • • • DESCRIPTION: 2.5 VDD 5 pairs of outputs Low skew: 50ps same pair, 100ps all outputs

pecl logic voltage levels

Abstract: 5T907 5T915 AN-230 5T905
Contextual Info: APPLICATION NOTE AN-230 I/O INTERFACE STANDARDS APPLICATION NOTE AN-230 I/O INTERFACE STANDARDS INTRODUCTION: INPUT SPECIFICATIONS FOR LVTTL AND LVCMOS The vast growth experienced by the communication and semiconductor industry in the past decade was matched with an equal increase in the number

Contextual Info: 5T2010 2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK INDUSTRIAL TEMPERATURE RANGE 5T2010 2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK PRODUCT DISCONTINUATION NOTICE - LAST TIME BUY EXPIRES ON OCTOBER 28, 2014 FEATURES: • • • • • • • •

70T3539M

Contextual Info: HIGH-SPEED 2.5V 512K x 36 SYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE Š IDT70T3539M Features: ◆ ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed data access – Commercial: 3.6ns 166MHz /4.2ns (133MHz)(max.)

Contextual Info: Š HIGH-SPEED 2.5V 256/128K x 72 IDT70T3719/99M SYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE Features: ◆ ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed data access

Contextual Info: HIGH-SPEED 2.5V 512/256/128K X 18 IDT70T3339/19/99S SYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE Š Features: ◆ ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed data access

IDT70T3319

Abstract: IDT70T3399
Contextual Info: HIGH-SPEED 2.5V 512/256/128K X 18 IDT70T3339/19/99S SYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE Features: ◆ ◆ ◆ ◆ ◆ ◆ ◆ True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed data access

BE5L

Abstract: O41L be5r BE6R O48R O71R
Contextual Info: Š Features: ◆ ◆ ◆ ◆ ◆ ◆ ◆ HIGH-SPEED 2.5V 256/128K x 72 IDT70T3719/99M SYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed data access

AN237 equivalent

Abstract: SMY02 5V996 AN-237 IDT5T2010 5T9110 5T9820 5T9821 5T9890 5T9891
Contextual Info: APPLICATION NOTE AN-237 PLL LOCK INDICATOR APPLICATION NOTE AN-237 PLL LOCK INDICATOR INTRODUCTION A PLL lock detector is implemented on the following device families: TurboClockII, TurboClockII Plus, TeraClock and Programmable Clock. The output of the lock detector is available on the LOCK pin. The lock circuitry

2F21

Contextual Info: 5T2010 2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK INDUSTRIAL TEMPERATURE RANGE 5T2010 PRELIMINARY 2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK FEATURES: • • • • DESCRIPTION: 2.5 VDD 5 pairs of outputs Low skew: 100ps same pair, 150ps all outputs