5AUG2008 Search Results

Contextual Info: 7 8 THIS DRAWING IS UNPUBLISHED. AA COPYRIGHT - RELEASED FOR PUBLICATION BY TYCO ELECTRONICS CORPORATION. 6 5 4 3 2 - LOC ALL INTERNATIONAL RIGHTS RESERVED. REVISIONS DIST 00 GP P LTR F A , DESCRIPTION DATE 5AUG2008 REVISED PER EC O - 08- 019241 DWN APVD ZMR DLG

HC273

Abstract: SN54HC377 SN74HC377 SN74HC377DW SN74HC377DWR SN74HC377N SN74HC377NSR SNJ54HC377J SNJ54HC377W
Contextual Info: SN54HC377, SN74HC377 OCTAL DĆTYPE FLIPĆFLOPS WITH CLOCK ENABLE SCLS307B– JANUARY 1996 – REVISED JANUARY 2003 D D D D D D D D D SN54HC377 . . . J OR W PACKAGE SN74HC377 . . . DW, N, OR NS PACKAGE TOP VIEW Wide Operating Voltage Range of 2 V to 6 V Outputs Can Drive Up To 10 LSTTL Loads

B340A

Abstract: TPS5420 TPS5420D TPS5420DR TPS5420-EP TPS5420MDREP TPSD107M010R0080
Contextual Info: TPS5420-EP www.ti.com SLVS717 – DECEMBER 2006 2-A WIDE-INPUT-RANGE STEP-DOWN SWIFT CONVERTER FEATURES • • • • • • • • • 1 Controlled Baseline – One Assembly/Test Site, One Fabrication Site Enhanced Diminishing Manufacturing Sources

CD74ACT86

Abstract: CD74ACT86MDREP CD74ACT86-EP
Contextual Info: CD74ACT86-EP QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE www.ti.com SCHS357 – MARCH 2006 FEATURES • • • • • • • • • 1 • Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –55°C to 125°C

AC374

Abstract: SN54AC374 SN74AC374 SN74AC374DBR SN74AC374DW SN74AC374DWR SN74AC374N SN74AC374NSR SN74AC374PW
Contextual Info: SN54AC374, SN74AC374 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SCAS543E − OCTOBER 1995 - REVISED OCTOBER 2003 D SN54AC374 . . . J OR W PACKAGE SN74AC374 . . . DB, DW, N, NS, OR PW PACKAGE TOP VIEW 2-V to 6-V VCC Operation Inputs Accept Voltages to 6 V

SN54ACT245

Abstract: SN74ACT245 SN74ACT245DBR SN74ACT245DW SN74ACT245DWR SN74ACT245N SN74ACT245NSR SN74ACT245PWR SNJ54ACT245J SN74ACT245PWLE
Contextual Info: SN54ACT245, SN74ACT245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCAS452E – SEPTEMBER 1994 – REVISED OCTOBER 2002 D D 4.5-V to 5.5-V VCC Operation Inputs Accept Voltages to 5.5 V Max tpd of 8 ns at 5 V Inputs Are TTL-Voltage Compatible SN54ACT245 . . . J OR W PACKAGE

A115-A

Abstract: SN74ACT1073 SN74ACT1073DW SN74ACT1073DWR SN74ACT1073NSR
Contextual Info: SN74ACT1073 16-BIT BUS-TERMINATION ARRAY WITH BUS-HOLD FUNCTION SCAS193A − MARCH 1992 − REVISED NOVEMBER 2002 D Designed to Ensure Defined Voltage Levels D D D D D D D D DW OR NS PACKAGE TOP VIEW on Floating Bus Lines in CMOS Systems 4.5-V to 5.5-V VCC Operation

Contextual Info: SN54HC640, SN74HC640 OCTAL BUS TRANSCEIVERS WITH 3ĆSTATE OUTPUTS SCLS303D − JANUARY 1996 − REVISED AUGUST 2003 D Wide Operating Voltage Range of 2 V to 6 V D High-Current 3-State Outputs Can Drive Up D D D D To 15 LSTTL Loads D Low Power Consumption, 80-µA Max ICC

Contextual Info: SN54F244, SN74F244 OCTAL BUFFERS/DRIVERS WITH 3ĆSTATE OUTPUTS SDFS063A − D2932, MARCH 1987 − REVISED OCTOBER 1993 • SN54F244 . . . J PACKAGE SN74F244 . . . DB, DW, OR N PACKAGE TOP VIEW 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers

Contextual Info: SN54ABT273, SN74ABT273 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR SCBS185B – FEBRUARY 1991 – REVISED JANUARY 1997 D D D D State-of-the-Art EPIC-ΙΙB  BiCMOS Design Significantly Reduces Power Dissipation Latch-Up Performance Exceeds 500 mA Per

Contextual Info: SN54ALS299, SN74ALS299 8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS WITH 3-STATE OUTPUTS SDAS220B – DECEMBER 1982 – REVISED DECEMBER 1994 • • • • • description These 8-bit universal shift /storage registers feature multiplexed I/O ports to achieve full 8-bit

Contextual Info: SN54BCT640, SN74BCT640 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCBS025C – SEPTEMBER 1988 – REVISED APRIL 1994 • • • • • SN54BCT640 . . . J OR W PACKAGE SN74BCT640 . . . DW OR N PACKAGE TOP VIEW State-of-the-Art BiCMOS Design Substantially Reduces Standby Current

Contextual Info: SN54LS245, SN74LS245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDLS146A – OCTOBER 1976 – REVISED FEBRUARY 2002 D D D D 3-State Outputs Drive Bus Lines Directly PNP Inputs Reduce dc Loading on Bus Lines Hysteresis at Bus Inputs Improves Noise Margins

Contextual Info: SN74LVTH16245A-EP 3.3-V ABT 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS www.ti.com FEATURES • • • • • • • • • • • • • • • 1 Controlled Baseline – One Assembly – One Test Site – One Fabrication Site Enhanced Diminishing Manufacturing

Contextual Info: SN54HC240, SN74HC240 OCTAL BUFFERS AND LINE DRIVERS WITH 3ĆSTATE OUTPUTS SCLS128D − DECEMBER 1982 − REVISED AUGUST 2003 LSTTL Loads D Low Power Consumption, 80-µA Max ICC D Typical tpd = 9 ns D ±6-mA Output Drive at 5 V D Low Input Current of 1 µA Max

Contextual Info: SN54ABT244, SN74ABT244A OCTAL BUFFERS/DRIVERS WITH 3ĆSTATE OUTPUTS SCBS099J − JANUARY 1991 − REVISED APRIL 2005 D D D D 1OE 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 GND 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 description 1A2 2Y3 1A3 2Y2 1A4 4 3 2 1 20 19

Contextual Info: SN54ALS573C, SN54AS573A, SN74ALS573C, SN74AS573A OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS SDAS048D – DECEMBER 1989 – REVISED JANUARY 1995 OE 1D 2D 3D 4D 5D 6D 7D 8D GND description These octal D-type transparent latches feature 3-state outputs designed specifically for driving

Contextual Info: SN55LVDS32, SN65LVDS32 SN65LVDS3486, SN65LVDS9637 www.ti.com SLLS262Q – JULY 1997 – REVISED JULY 2007 HIGH-SPEED DIFFERENTIAL LINE RECEIVERS The intended application of these devices and signaling technique is both point-to-point and multidrop one driver and multiple receivers data

CD74ACT86-EP

Contextual Info: CD74ACT86-EP QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE www.ti.com SCHS357 – MARCH 2006 FEATURES • • • • • • • • • 1 • Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –55°C to 125°C

Contextual Info: SN54F241, SN74F241 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SDFS090 – MARCH 1987 – REVISED OCTOBER 1993 • SN54F241 . . . J PACKAGE SN74F241 . . . DW OR N PACKAGE TOP VIEW 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Package Options Include Plastic

Contextual Info: SN54LVC373A, SN74LVC373A OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS www.ti.com SCAS295S – JANUARY 1993 – REVISED MAY 2005 • 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC 8Q 8D 7D 7Q 6Q 6D 5D 5Q LE ABC 1Q 1D 2D 2Q 3Q 3D 4D 4Q 20 2

Contextual Info: SN54AHC574, SN74AHC574 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS SCLS244I – OCTOBER 1995 – REVISED JULY 2003 D Operating Range 2-V to 5.5-V VCC 3-State Outputs Drive Bus Lines Directly Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22

Contextual Info: SN54F521, SN74F521 8-BIT IDENTITY COMPARATORS SDFS091 – MARCH 1987 – REVISED OCTOBER 1993 Compares Two 8-Bit Words Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs SN54F521 . . . J PACKAGE

Contextual Info: SN54BCT241, SN74BCT241 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS005D – OCTOBER 1987 – REVISED APRIL 1994 • • • • SN54BCT241 . . . J OR W PACKAGE SN74BCT241 . . . DB, DW OR N PACKAGE TOP VIEW State-of-the-Art BiCMOS Design Significantly Reduces ICCZ