57715 Search Results

57715

Abstract: m57715
Contextual Info: M ITSUBISHI R F PO W ER MODULE M 5 7 7 1 5 1 4 4 — 148M H z, 10W , FM FOR M O BILE RADIO A PPLICATIO N DESCR IPTIO N M 57715 is a th ic k film O U T L IN E D R AW IN G RF pow er m od u le sp e cifica lly designed fo r 144 ~ 148M H z, 10W FM m ob ile radios.

M67729H2

Abstract: M67729 M67709SL M67709L M67709M m67746 M67709SH M57788MR M57729SH M67709
Contextual Info: HYBRID ICs FOR MOBILE RADIO APPLICATIONS 1 5 0 M H z /2 2 0 M H z /4 0 0 M H z /8 0 0 M H z BAND FOR FM MOBILE RADIO APPLICATIONS Application M67742 68 - 88MHz, 25W, FM M5770SL 1 3 5 - 175MHz, 5W, FM M 57706 M57719L M 57719 1 3 5 - 175MHz, 10W, FM M 5 7 7 I9 N

Contextual Info: IP00C786 IMAGE PROCESSORS Warping/2K1K PRODUCT BRIEF Product Description Applications IThe IP00C786 is a powerful warping device featuring full 10-bit internal processing. With its high-speed input and output ports at 166 MHz, it can handle images up to 2048 x

ip00c

Contextual Info: IP00C811 IP00C811 Specifications INPUT 2 PORTS • 30-bit RGB/YUV 4:4:4 @ 166 MHz • 20-bit/10 bit YUV 4:2:2 @ 166 MHz EMBEDDED ANALOG FRONT-END • Video decoder for NTSC/PAL/SECAM • Supports Composite (CVBS) and S-Video inputs • 10-bit ADC • Adaptive Comb filter for Y/C separation

LZ95G55

Abstract: ccd cmos 84 24128 57415 bcp 846 QFP072-P-1010 LZ2313B5 LZ2313 external VD 13ll
Contextual Info: LZ95G55 SHARP LZ95G55 Single-Chip Driver LSI for CCD FEATURES • • • • Switchable between 270 000 pixels CCD and 320 000 pixels CCD Switchable between NTSC EIA and PAL (CCIR) systems Built-in EE (Electronic Exposure) control (1/60 to 1/100 000 s for NTSC; 1/50 to 1/100 000 s

I7868

Abstract: LZ95G41
Contextual Info: SHARP LZ95G41 LZ95G41 Single-chip Driver LSI for CCD DESCRIPTION PIN CONNECTIONS The LZ95G41 is a CMOS single chip driver LSI which provides timing pulses used to drive a CCD area sensor, and generates synchronous pulses for TV signals and processing pulses

Contextual Info: IP00C705 IP00C705 Specifications INPUT FRAME RATE CONVERSION 36-bit RGB/36-bit YUV444/24-bit YUV422 at 166 MHz or 83 MHz in DDR mode 12-bit YUV422 Bt656 at 166 MHz Progressive or interlaced formats Up to 4096 pixels per line, with 2176 active pixels External synchronization

IP00C762

Contextual Info: IP00C762 ¡-Chips 1080 p De-interlacer/Scaler General Description The IP00C762 is a highly-integrated 10-bit Display Processor featuring an advanced motion-adaptive de-interlacer and scaler for producing high-quality output up to 1080p. It can drive any digital

RS 341-547

Abstract: 341-547 RS 341-519 259-561 472-269 341-519 465-261 338-951 336-731 316844
Contextual Info: Issued March 1997 232-4673 Data Pack A Data Sheet Panel design CAD software RS stock numbers 219-923, 842-589 Introduction PanelsCAD was developed to ease the production of project designs, manufacturing drawings and service documentation. It is an add-on package for EasyCAD2

AMP PBT connector 1-965 334-1

Abstract: 13-053 TYCO H05W-F3G1 IEC 60320 OUTLET EN60309 IEC320 C14 Inlet Male Power Socket w Fuse Switch BS5733 din 49440 ASE1011 IEC-309
Contextual Info: 1717 Technical portal and online community for Design Engineers - www.element-14.com Connectors - Power & Mains Page 1719 1744 1728 1736 1744 1734 1727 1735 1728 1729 1732 1731 1744 1733 1736 Adaptors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

IP00C732

Contextual Info: IP00C732 Quad Input/Output Scaler IMAGE PROCESSORS PRODUCT BRIEF Product Description Applications The IP00C732 is a single-chip solution for high-resolution displays such as 4K2K or 2560x1600. It can also be configured to drive a single 1080P or WUXGA output with 4

IP00C753

Contextual Info: IP00C753 IP00C753 Specifications INPUT 2 PORTS RGB or YUV4:4:4 30 bits @ 162 MHz YUV4:2:2 24 bits @ 162 MHz YUV4:2:2 10 bits @ 162 MHz (BT656 input) OUTPUT RGB or YUV4:4:4 30 bits @ 162 MHz FPD Link output, LVCMOS compatible IMAGE SIZE Channel 1: Up to 4096 pixels/line with 2048 active pixels max.*

Contextual Info: microelectronics Data Sheet June 1999 group Lucent Technologies Bell Labs Innovations CDRM622 622 Mbits/s Multichannel Digital Timing Recovery Features Description • Receives scrambled serial data at STS-12/STM-4 622.08 Mbits/s rate. The CDRM622 provides a physical medium for high­

B744 transistor

Abstract: circuit diagram for sma 4038 b744 RJ 000002 BF 3027 HP 2231 PCM51JG V PCM51JG-V 80046 BB 9852
Contextual Info: B U R R - B R O W H N PCM51JG i D ESIG NED FOR A U D IO H ci c. 16-Bit ° /A DIGITAL-TO-ANALOG CONVERTER -ft i_ f *v" FEATURES DESCRIPTION • 16-BIT RESOLUTION T h e P C M 5 1 is d e s i g n e d f o r P C M a u d i o a p p l i c a t i o n s a n d is c o m p a t i b l e w i t h E I A J S T C - 0 0 7 s p e c i f i c a t i o n s .

Contextual Info: IP00C502 IP00C502 Specifications LIVE IMAGE FORMAT CAPTURE FUNCTION RGB/YUV 4:4:4 36-bit @ 162MHz YUV4:2:2 24-bit @ 162 MHz Able to capture live image to SDRAM in RGB565 format and then transfer the captured data to serial flash LIVE IMAGE SIZE Horizontal sync signal interval: up to 4096 pixels

Contextual Info: IP00C773 IP00C773 Specifications IMAGE SCALING INPUT YUV4:2:2 20-bit @ 148.5 MHz YUV4:2:2 10-bit @ 27 MHz 6x6 interpolation with FIR filter EXTERNAL MEMORY OUTPUT With bitmap OSD: 64M/128Mbit SDRAM device, 32-bit memory bus, 166 MHz RGB/YUV4:4:4 30-bit @ 148.5 MHz

5617760-2040

Abstract: 3024-12-561322 5617897-2020 278327N001 A17676-000 5617760-2087 5617760-3042 5617897-2061 5617760-9160 5617760-7083
Contextual Info: CUSTOMER DRAWING T-FIT ADAPTER AND MOLDED PARTS BOOT KITS A STANDARD KIT SHALL CONSIST OF 1 PIECE EACH: ADAPTER, BOOT, SolderShield SPLICE, ATUM TUBING Optional 1. ADAPTER (STRAIGHT, 45 OR 95 DEGREE) 2. MOLDED PARTS BOOT 3. SolderShield SPLICE 4. ATUM TUBING (KIT DESCRIPTIONS END WITH LETTER "A" ONLY)

JRC 45600

Abstract: YD 803 SGS 45600 JRC TDA 7277 TDA 5072 krp power source sps 6360 2904 JRC Sony SHA T90 SA philips HFE 4541
Contextual Info: I SEMICON INDEXES Contents and Introduction Manufacturers' Information V O LU M E 3 INTERNATIONAL INTEGRATED CIRCUITS INDEX 15th EDITION 1997 Numerical Listing of Integrated Circuits Substitution Guide U D C 621.382.3 Diagram s THE S E M IC O N INTERNATIONAL INDEXES

HL250C

Abstract: BF910 CDRM622 Lucent receiver mn97
Contextual Info: Data Sheet June 1999 CDRM622 622 Mbits/s Multichannel Digital Timing Recovery Features • Receives scrambled serial data at STS-12/STM-4 622.08 Mbits/s rate. ■ Demultiplexes serial data to 77.76 Mbytes/s parallel byte wide data with aligned 77.76 MHz clock.

258-041

Abstract: round insulated socket 444-618 470415 581-874 465-255 35106 rs components 173-029 472-152 rs 347-719 317033
Contextual Info: Issued July 1994 A17878 Paneldesign CAD software RS stock numbers 219-923,842-589 Introduction PanelsCAD was developed to ease the production of project designs, manufacturing drawings and service documentation. It is an add-on package for EasyCAD2 RS stock no. 216-031 or FastCAD (RS stock no.

ta437

Contextual Info: SHARP LZ95G65 Single-chip Driver LSI for CCD DESCRIPTION PIN CONNECTIONS 48-PIN QFP a £ i- i >> >> TOP VIEW o ? w N T- i- 50>5toc/>coco V3 x {37 m ]f s V4 x [38 23]FCDS 22]EENR OFDX[39 FEATURES • Switchable between 410 XX pixels B/W CCD and 470 000 pixels B/W CCD

i-Chips Technology

Abstract: IP00C762
Contextual Info: IP00C763 IP00C763 Specifications INPUT ON-SCREEN DISPLAY Bitmap OSD featuring 256 colors Supports for blinking and semi-transparent OSD RGB 60-bit/YUV4:4:4 60-bit @81MHz RGB 36-bit/YUV4:4:4 36-bit/YUV4:2:2 24-bit/YUV4:2:2 10-bit @162Mhz Interlace/Progressive compatible

IP00C812

Abstract: IP00C812A rgb 8 bit to lvds SCALER
Contextual Info: IP00C812A Dual Input/Output De-interlacer/Scaler IMAGE PROCESSORS PRODUCT BRIEF Product Description Applications The IP00C812A is a dual-input/dual-output de-interlacer and scaler on a single device. It features a built-in video decoder, ARM9 CPU, LVDS output, along with Ethernet and USB

709b

Abstract: 6AC7 PCM51 76025 pcm51jg-v PCM51JG V 7428c 7H67
Contextual Info: PCM51JG B U R R - B R O W N - DESIGN ED FOR AUDIO ] [ 0 2 ^ 0 <r* 1_ • f. 16-Bit 0 /A DIGITAL-TO-ANALOG CO N VERTER FEATURES • 16-BIT RESOLUTION • 350nsec SETTLING TIME, typ I Model • 5/jsec SETTLING TIME, typ (V Model) • 0.006% OF FSR MAX DIFFERENTIAL LINEARITY