54LS367ADM Search Results

Contextual Info: National Semiconductor , , May 1989 54LS367A/DM54LS367A/DM74LS367A Hex TRI-STATE Buffers General Description This device contains six independent gates each of which performs a non-inverting buffer function. The outputs have the TRI-STATE feature. When enabled, the outputs exhibit

1T21

Contextual Info: S E M IC O N D U C T O R tm DM74LS367A Hex 3-STATE Buffers Features • Alternate m ilitary/aerospace device 54LS367A is available. C ontact a Fairchild S em iconductor sales office/distributor fo r specifications. Connection Diagram Dual-ln-Line Package

Contextual Info: 367A CO NNECTIO N DIAGRAM PINOUT A J / 54LS/74LS367A HEX 3 -S T A T E BUFFER '• A W ith S e p a ra te 2 - B it a n d 4 - B it S e c tio n s ^ ORDERING CODE: See Section 9 PIN PKGS Plastic DIP (P) OUT A CO M M ERCIAL GRADE M ILITARY GRADE = V cc +5.0 V ±5%,

S67n

Contextual Info: LS367A National Semiconductor 54LS367A/DM54LS367A/DM74LS367A Hex TRI-STATE Buffers General Description This device contains six independent gates each of which performs a non-inverting buffer function. The outputs have the TRI-STATE feature. When enabled, the outputs exhibit

LS367A

Contextual Info: LS367A National Semiconductor 54LS367A/DM54LS367A/DM74LS367A Hex TRI-STATE Buffers General Description This device contains six independent gates each of which performs a non-inverting buffer function. The outputs have the TRI-STATE feature. When enabled, the outputs exhibit

54LS367A

Abstract: 54LS367ADMQB 54LS367AFMQB 54LS367ALMQB DM54LS367AJ DM54LS367AW DM74LS367A DM74LS367AM DM74LS367AN
Contextual Info: DM74LS367A Hex 3-STATE Buffers General Description This device contains six independent gates each of which performs a non-inverting buffer function. The outputs have the 3-STATE feature. When enabled, the outputs exhibit the low impedance characteristics of a standard LS output with

74LS367APC

Abstract: 74LS367ADC 74LS367A 54LS367ADM 54LS367AFM 74LS367AFC 74LS
Contextual Info: 367A 7 J CO NNECTIO N DIAGRAM PINOUT A 54LS /74LS 367A HEX 3-STATE BUFFER With Separate 2-Bit and 4-Bit Sections i ^ - j ORDERING CODE: See Section 9 PIN PKGS Plastic DIP IP) Ceramic DIP (D) Flatpak (F) OUT CO M M ERCIAL GRADE M ILITARY GRADE V cc = +5.0 V ±5%,

Contextual Info: 54LS367A,DM54LS367A,DM74LS367A 54LS367A DM54LS367A DM74LS367A Hex TRI-STATE RM Buffers Literature Number: SNOS305A 54LS367A DM54LS367A DM74LS367A Hex TRI-STATE Buffers General Description that two outputs will attempt to take a common bus to opposite logic levels the disable time is shorter than the enable

54LS367A

Abstract: 54LS367ADMQB 54LS367AFMQB 54LS367ALMQB DM54LS367AJ DM54LS367AW DM74LS367A DM74LS367AM DM74LS367AN E20A
Contextual Info: S E M IC O N D U C T O R tm DM74LS367A Hex 3-STATE Buffers cant load nor as a driver. To m inim ize th e possibility th a t two outputs will attem pt to ta ke a com m on bus to opposite logic levels, th e disable tim e is shorter than the enable tim e of the

54LS367A

Abstract: 54LS367ADMQB 54LS367AFMQB 54LS367ALMQB DM54LS367AJ DM54LS367AW DM74LS367AM DM74LS367AN E20A
Contextual Info: May 1989 Semiconductor 54LS367A/DM54LS367A/DM74LS367A Hex TRI-STATE Buffers General Description This device contains six independent gates each of which performs a non-inverting buffer function. The outputs have the TRI-STATE feature. When enabled, the outputs exhibit

54LS367A

Abstract: 54LS367ADMQB 54LS367AFMQB 54LS367ALMQB DM54LS367A DM54LS367AJ DM54LS367AW DM74LS367A DM74LS367AM DM74LS367AN
Contextual Info: 54LS367A DM54LS367A DM74LS367A Hex TRI-STATE Buffers General Description This device contains six independent gates each of which performs a non-inverting buffer function The outputs have the TRI-STATE feature When enabled the outputs exhibit the low impedance characteristics of a standard LS output

Contextual Info: R C H U - P S E M IC O N D U C T O R tm DM74LS367A Hex 3-STATE Buffers cant load nor as a driver. To m inim ize th e possibility th a t two outputs will attem pt to take a com m on bus to opposite logic levels, th e disable tim e is shorter than the enable tim e of the