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54AC11240 Datasheets (2)

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Texas Instruments

Part	ECAD Model	Manufacturer	Description	Datasheet Type	PDF	PDF Size	Page count
54AC11240FK		Texas Instruments	OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS	Scan	PDF	130.99KB	5
54AC11240JT		Texas Instruments	OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS	Scan	PDF	130.99KB	5

54AC11240 Price and Stock

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Texas Instruments


Texas Instruments SNJ54AC11240FK Buffer/Line Driver Buffer, Inverting 2 Element 4 Bits 3.3V, 5V 28-LCC
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Rochester Electronics	SNJ54AC11240FK		48		1	1 - 10 - 100 $7.60 1000 $6.80 10000 $6.40	Buy Now
Vyrian	SNJ54AC11240FK		6,778			1 - 10 - 100 - 1000 - 10000 -	Get Quote
Texas Instruments 54AC11240JT Bus Driver, AC Series, 2-Func, 4-Bit, Inverted Output, CMOS, CDIP24
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Vyrian	54AC11240JT		6,098			1 - 10 - 100 - 1000 - 10000 -	Get Quote
Texas Instruments SNJ54AC11240JT Bus Driver, 2-Func, 4-Bit, Inverted Output, CMOS, CDIP24
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Vyrian	SNJ54AC11240JT		5,833			1 - 10 - 100 - 1000 - 10000 -	Get Quote
Texas Instruments 54AC11240FK Bus Driver, AC Series, 2-Func, 4-Bit, Inverted Output, CMOS, CQCC28
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Vyrian	54AC11240FK		3,412			1 - 10 - 100 - 1000 - 10000 -	Get Quote

54AC11240 Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
Contextual Info: 54AC11240, 74AC11240 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS TI0070—03408. MAY 1987—REVISED MARCH 1990 Flow-Through Architecture to Optimize PCB Layout 54AC11240 . . . JT PACKAGE 74AC11240 . . . DW OR NT PACKAGE TOP VIEW • Center-PIn Vcc and GND Configurations to	OCR Scan	54ac11240 74ac11240 ti0070--03408 1987--revised +2500-ma 300-mll	PDF
Contextual Info: 54AC11240, 74AC11240 OCTAL BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS _ D3409, MAY 1 9 8 7 - REVISED APRIL 1993 * Flow-Through Architecture Optimizes PCB Layout * Center-Pin Vcc and GND Configurations Minimize High-Speed Switching Noise * EPIC Enhanced-Performance Implanted	OCR Scan	54ac11240 74ac11240 d3409 500-ma +1300-mil	PDF
2A243 Contextual Info: 54AC11240, 74AC11240 OCTAL BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS SCAS169 – MAY 1987 – REVISED APRIL 1993 • • • • • Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC Enhanced-Performance Implanted	Original	54ac11240 74ac11240 scas169 500-ma +2300-mil 2a243	PDF
2AL-17 Abstract: 74AC11240 Contextual Info: 54AC11240, 74AC11240 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS TI0070— D3409, MAY 1987— REVISED MARCH 1890 Flow-Through Architecture to Optimize PCB Layout 54AC11240 . . . JT PACKAGE 74AC11240 . . . DW OR NT PACKAGE TOP VIEW Center-Pin V cc and GND Configurations to	OCR Scan	54ac11240 74ac11240 ti0070 d3409 +3500-ma 300-mil 2al-17	PDF
54AC240 Abstract: 5962-87550 Contextual Info: ¿ ¡S T R IB ^ T IO J M S T A T E M E N ^ A ^ A p p roved for p u b lic r e le a s e ; d istrib u tio n is u nlim ited . DESC FORM 193 MAY 86 Powered by ICminer.com Electronic-Library Service CopyRight 2003 1. SCOPE - 1.1 Scope. This drawing d escrib e s device requirements fo r c la s s B m ic ro c irc u its in accordance with	OCR Scan	mil-std-883 m1l-std-883 mil-m-38510 54ac240 +754ac11240 -8755002jx snj54ac11240j m38510/75723bjx -8755002kx snj54ac11240w 5962-87550	PDF
ITE 8510 Abstract: 54AC240 Contextual Info: ¿ ¡S T R IB ^ T IO J M S T A T E M E N ^ A ^ A p p roved for p u b lic r e le a s e ; d istrib u tio n is u nlim ited . DESC FORM 193 MAY 86 This Material Copyrighted By Its Respective Manufacturer 1. SCOPE - 1.1 Scope. This drawing d escrib e s device requirements fo r c la s s B m ic ro c irc u its in accordance with	OCR Scan	mil-std-883 m1l-std-883 mil-m-38510 54ac240 +754ac11240 snj54ac11240j m38510/75723bjx -8755002kx snj54ac11240w -87550023x ite 8510	PDF
qml-38535 Abstract: 54AC240 5962F87550 5962F8755001VXC RHFAC240D04V RHFAC240K02Q 5962F8755001VXA rhfac240 Contextual Info: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED A Changes in accordance with NOR 5962-R083-93. - wlm 93-03-01 Monica L. Poelking B Changes in accordance with NOR 5962-R096-98. - jak 98-04-24 Monica L. Poelking C Add vendor CAGE F8859. Add device class V criteria. Add delta limits, table III.	Original	5962-r083-93 5962-r096-98 f8859 mil-prf-38535 +10bp4199 3v146 qml-38535 54ac240 5962f87550 5962f8755001vxc rhfac240d04v rhfac240k02q 5962f8755001vxa rhfac240	PDF
5962L0053605VYC Abstract: 5962-9069204QXA ATMEL 302 24C16 UT9Q512E-20YCC MOH0268D UT54ACS164245SEIUCCR Z085810 5962-9762101Q2A UT28F256QLET-45UCC 5962R0250401KXA Contextual Info: NOT MEASUREMENT SENSITIVE MIL-HDBK-103AJ 19 SEPTEMBER 2011 SUPERSEDING MIL-HDBK-103AH 28 MARCH 2011 DEPARTMENT OF DEFENSE HANDBOOK LIST OF STANDARD MICROCIRCUIT DRAWINGS This handbook is for guidance only. Do not cite this document as a requirement. AMSC N/A	Original	mil-hdbk-103aj mil-hdbk-103ah 5962l0053605vyc 5962-9069204qxa +8atmel 302 24c16 ut9q512e-20ycc moh0268d ut54acs164245seiuccr z085810 5962-9762101q2a ut28f256qlet-45ucc 5962r0250401kxa	PDF