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    54AC11010 Search Results

    54AC11010 Datasheets (4)

    Texas Instruments
    Part ECAD Model Manufacturer Description Datasheet Type PDF PDF Size Page count
    54AC11010
    Texas Instruments TRIPLE 3-INPUT POSITIVE-NAND GATES Original PDF 86.58KB 5
    54AC11010
    Texas Instruments TRIPLE 3-INPUT POSITIVE-NAND GATES Original PDF 65.98KB 5
    54AC11010FK
    Texas Instruments IC NAND GATE TRIPLE 3IN CMOS 20LCCC Original PDF 65.98KB 5
    54AC11010J
    Texas Instruments IC NAND GATE TRIPLE 3IN CMOS 16CDIP Original PDF 65.98KB 5
    SF Impression Pixel

    54AC11010 Price and Stock

    Texas Instruments

    Texas Instruments SNJ54AC11010J

    Logic IC NAND Gate 3 Element 3.3V, 5V 16-DIP Tube
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Rochester Electronics SNJ54AC11010J 150 1
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    Vyrian SNJ54AC11010J 3,604
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    Texas Instruments SN54AC11010FKR

    NAND Gate, AC Series, 3-Func, 3-Input, CMOS, CQCC20
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Vyrian SN54AC11010FKR 7,148
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    Texas Instruments 54AC11010J

    NAND Gate, AC Series, 3-Func, 3-Input, CMOS, CDIP16
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Vyrian 54AC11010J 6,728
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    Texas Instruments SN54AC11010J

    NAND Gate, AC Series, 3-Func, 3-Input, CMOS, CDIP16
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Vyrian SN54AC11010J 6,045
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    Texas Instruments 54AC11010FK

    NAND Gate, AC Series, 3-Func, 3-Input, CMOS, CQCC20
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Vyrian 54AC11010FK 5,600
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    54AC11010 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    54AC11010

    Abstract: 74AC11010
    Contextual Info: 54AC11010, 74AC11010 TRIPLE 3-INPUT POSITIVE-NAND GATES SCLS057 – MAY 1987 – REVISED APRIL 1993 • • • • • 54AC11010 . . . J PACKAGE 74AC11010 . . . D OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations


    Original
    54ac1101074ac11010scls057500-ma+1300-mil PDF

    54AC11010

    Abstract: 74AC11010
    Contextual Info: 54AC11010, 74AC11010 TRIPLE 3-INPUT POSITIVE-NAND GATES SCLS057 – MAY 1987 – REVISED APRIL 1993 • • • • • 54AC11010 . . . J PACKAGE 74AC11010 . . . D OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations


    Original
    54ac1101074ac11010scls057500-ma+1300-mil PDF

    Contextual Info: 54AC11010,74AC11010 TRIPLE 3-INPUT POSITIVE-NAND GATES D2957, MAY 1987 - REVISED APRIL 1993 • ■ * Flow-Through Architecture Optimizes PCB Layout I I • Center-Pin Vqq and GND Configurations Minimize High-Speed Switching Noise | • EPIC'" Enhanced-Performance Implanted


    OCR Scan
    54ac1101074ac11010d2957500-ma+1300-mil PDF

    Contextual Info: 54AC11010, 74AC11010 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES ăą SCLS057 − MAY 1987 − REVISED APRIL 1993 • • • • • 54AC11010 . . . J PACKAGE 74AC11010 . . . D OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations


    Original
    54ac1101074ac11010scls057500-ma+1300-mil PDF

    54AC11010

    Abstract: 74AC11010
    Contextual Info: 54AC11010, 74AC11010 TRIPLE 3ĆINPUT POSITIVEĆNAND GATES ăą SCLS057 − MAY 1987 − REVISED APRIL 1993 • • • • • 54AC11010 . . . J PACKAGE 74AC11010 . . . D OR N PACKAGE TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations


    Original
    54ac1101074ac11010scls057500-ma+1300-mil PDF

    Contextual Info: 54AC11010,74AC11010 TRIPLE 3-INPUT POSITIVE-NAND GATES D2957, MAY 1987 - REVISED APRIL 1983 Flow-Through Architecture Optimizes PCB Layout Center-PIn Vqc and GND Configurations Minimize High-Speed Switching Noise EP IC “ Enhanced-Performance Implanted CMOS 1-|j.m Process


    OCR Scan
    54ac1101074ac11010d2957500-ma+1300-mll PDF

    S2-34

    Contextual Info: 54AC11010, 74AC11010 TRIPLE 3-INPUT POSITIVE-NAND GATES TI0048— D2957, M AY 1987—R EVISED MARCH 1990 Flow-Through Architecture to Optimize PCB Layout 54AC11010 . . . J PACKAGE 74AC11010 . . . 0 OR N PACKAGE TOP VIEW • Center-PIn Vq c and GND Configurations to


    OCR Scan
    54ac1101074ac11010ti0048--d2957+41987--r500-ma300-mils2-34 PDF

    54AC11010

    Abstract: 74AC11010 D2957
    Contextual Info: 54AC11010, 74AC11010 TRIPLE 3-INPUT POSITIVE-NAND GATES TI0048— D2957, MAY 1987—REVISED MARCH 1990 Flow-Through Architecture to Optimize PCB Layout 54AC11010 . . . J PACKAGE 74AC11010 . . . D O R N PACKAGE TOP VIEW Center-Pin V q C and GND Configurations to


    OCR Scan
    54ac1101074ac11010ti0048d2957+2500-ma300-mil PDF

    54900

    Abstract: 54AC10 54AC11010 3Y SMD
    Contextual Info: REVISIONS LTR A DATE YR-MO-DA DESCRIPTION APPROVED 1989 AUG 11 Add device type 02. Add vendor CAGE 01295 for device type 02, cases E, F, and 2. Technical changes in 1.4 and table I. Change drawing CAGE code to 67268. Editorial changes through­ out. CURRENT CAGE CODE 67268


    OCR Scan
    f0/75002bdx5962-87610012x54ac10lmqbm38510/75002b2x+105962-8761002exsnj54ac11010j5962-8761002fxsnj54ac11010w5962-87610022xsnj54ac11010fk5490054ac1054ac110103y smd PDF

    5962L0053605VYC

    Abstract: 5962-9069204QXA ATMEL 302 24C16 UT9Q512E-20YCC MOH0268D UT54ACS164245SEIUCCR Z085810 5962-9762101Q2A UT28F256QLET-45UCC 5962R0250401KXA
    Contextual Info: NOT MEASUREMENT SENSITIVE MIL-HDBK-103AJ 19 SEPTEMBER 2011 SUPERSEDING MIL-HDBK-103AH 28 MARCH 2011 DEPARTMENT OF DEFENSE HANDBOOK LIST OF STANDARD MICROCIRCUIT DRAWINGS This handbook is for guidance only. Do not cite this document as a requirement. AMSC N/A


    Original
    mil-hdbk-103ajmil-hdbk-103ah5962l0053605vyc5962-9069204qxa+8atmel 302 24c16ut9q512e-20yccmoh0268dut54acs164245seiuccrz0858105962-9762101q2aut28f256qlet-45ucc5962r0250401kxa PDF