5492MD Search Results
5492MD Datasheets Context Search
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Contextual Info: LH5492 4 K x 9 Clocked FIFO FEATURES status output signals are synchronized to these clocks, to simplify system design. The input and output ports oper ate altogether independently of each other, except when the FIFO becomes either totally full or else totally empty. |
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lh549232-pinplcc32-p-r450-ped450-mil+1 | |
LH5492
Abstract: 32-PIN
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lh549232plcc-132-pin450-mil+3 | |
lh5492Contextual Info: LH5492-/ 4K x 9 Clocked FIFO simplify system design. The input and output ports oper ate altogether independently of each other, except when the FIFO becomes either absolutely full or else absolutely empty. FEATURES • Fast Cycle Times: 25/35/50 ns Frequency: 40/28.5/20 MHz |
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lh5492-/32-pinoct91lh5492+3 | |
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Contextual Info: LH5492 FEATURES • Fast Cycle Times: 25/30/35 ns Frequency: 40/33/28.5 MHz • Parallel Data In; Parallel Data Out • Two Read Enable Inputs and Two Write Enable Inputs, Sampled on Rising Edge of the Appropriate Clock • Fast-Fall-Through Time Internal Architecture Based |
OCR Scan |
lh549232-pinplcc32-p-r450lh5492u-25+1 | |
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Contextual Info: LH5492 FEATURES • Fast Cycle Times: 25/30/35 ns Frequency: 40/33/28.5 MHz • Parallel Data In; Parallel Data Out • Two Read Enable Inputs and Two Write Enable Inputs, Sampled on Rising Edge of the Appropriate Clock • Fast-Fall-Through Time Internal Architecture Based |
OCR Scan |
lh549232-pinplcc32-p-r450-pedlh5492u-25+1 |