5474F Search Results

Contextual Info: S E M IC O N D U C T O R T M DM7474 Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs General Description This device contains tw o independent positive-edge-triggered D flip-flops w ith com plem entary o ut­ puts. The inform ation on the D input is accepted by the

F7474PC

Abstract: 74ls74d 7474 pin out diagram ic 7474 pin diagram 74H74D 7474PC IC 74LS74 pin IC 7474 74LS74PC IC 7474 flipflop
Contextual Info: 74 C O N N E C T IO N DIAGRAM S P IN O U T A 54/7474 < ? / / 6 ' \/54H/74H74 t f e. j w w^4S/74S74 £>/, o 'b, U34LS/74LS74 ^ ^ < - 3 ^ — "Si / / DUAL D-TYPE POSITIVE ED G e"TRIGGERED FLIP-FLOP P IN O U T B DESCRIPTIO N — The ’74 devices are dual D-type flip-flops with Direct C le a r

Contextual Info: In te g ra te d D evice Technology, Inc. FAST CMOS OCTAL BIDIRECTIONAL TRANSCEIVERS IDT54/74FCT245T/AT/CT/DT IDT54/74FCT640T/AT/CT IDT54/74FCT645T/AT/CTIDT FEATURES: DESCRIPTION: • Fastest CMOS logic family available • Std., A, C, and D speed grades w ith 3.8ns tPD

DM7474N

Abstract: 5474DMQB 5474FMQB DM5474J DM5474W DM7474 DM7474M J14A M14A
Contextual Info: DM7474 Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs General Description This device contains two independent positive-edge-triggered D flip-flops with complementary outputs. The information on the D input is accepted by the

7474PC

Abstract: 74LS74PC 74h74p 74LS74DC 74ls74D 7474 truth table 74H74D 7474 D flip-flop 7474 pin out diagram 74H74DC
Contextual Info: 74 CONNECTIO N DIAGRAMS PINOUT A 54/7474 < 2 y / 6 ‘ V/S4H/74H74 û / / ^S4S/74S74 0 / / 5 3 s 54L S /74L S 74 { / / i ; = DUAL D-TYPE POSITIVE EDGETRIGGERED FLIP-FLOP D DESCRIPTION — T h e '74 devices are dual D-type flip -flop s with Direct Clear and Set inputs and com plem entary Q, Q outputs. Inform ation at the input is

AN7373

Abstract: transistor bc 564 crosstalk minimization bus inverter fct 245a Decoupling And Layout Of Digital Printed Circuits 74fct540 TRANSISTOR BC 814 74FCT245M ibm hardware mca HARRIS PACKAGE LOGIC FCT
Contextual Info: BiCMOS Technical Overview Features TABLE 1. Harris BiCMOS FCT is a broad family of 8-bit, 9-bit and 10bit computer-bus interface logic ICs. Harris FCT BiCMOS Bus-lnterface ICs are designed to satisfy four m ajor require­ ments of modern bus-oriented com puter systems, namely:

Contextual Info: AA MOTOROLA MC54F/74F378 PARALLEL D REGISTER WITH ENABLE DESCRIPTION — The M C54F/74F378 is a 6-bit reg ister w ith a b u ff­ ered c o m m o n en able. T h is d e v ice is s im ila r to the 'F1 74, but w ith co m m o n E n a b le rath er than co m m o n M a s te r Reset.

application 74f162

Abstract: 74f162 74F160A 74F162A MC54
Contextual Info: MOTOROLA MC54F/74F160A MC54F/74F162A SYNCHRONOUS PRESETTABLE BCD DECADE COUNTER PE CEP CET — T h e M C 5 4 7 4 F 1 6 0 A and M C 5 4 /7 4 F 1 6 2 A are h ig h -s p e e d s y n c h ro n o u s d e c a d e c o u n te r s o p e ra tin g in th e BCD 8421 s e q u e n c e . T h e y are s y n c h r o n o u s ly p re s e tta ­

5474DMQB

Abstract: 5474FMQB DM5474J DM5474W DM7474M DM7474N J14A M14A N14A F 6526
Contextual Info: June 1989 Semiconductor 5474/DM5474/DM7474 Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs General Description This device co nta in s tw o independent p ositive-edge-trig­ gered D flip-flo p s w ith com plem entary outputs. The inform a­

74LS74 truth table

Abstract: 7474PC 74LS74PC pin IC 7474 DE flip-flop 7474 74ls74d 74S74 national 74ls74 ic logic diagram of ic 7474 54LS74FM
Contextual Info: NATIONAL SENICOND -CLOGIO D2E D | LSDllES D0b371S 2 | 74 T-46-07-09 CO NNECTIO N DIAGRAM S PINO UT A 54/7474 54H/74H74 54S/74S74 54LS/74LS74 DUAL D-TYPE POSITIVE EDGETRIG GERED FLIP-FLOP PINO UT B DESCRIPTION — The '74 devices are dual D-type flip -flo p s w ith Direct Clear

Contextual Info: June 1989 Semiconductor 5474/DM5474/DM7474 Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs General Description This device contains two independent positive-edge-trig­ gered D flip-flops with complementary outputs. The informa­

Contextual Info: June 1989 5474/DM5474/DM7474 Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs General Description This device contains two independent positive-edge-trig­ gered D flip-flops with complementary outputs. The informa­ tion on the D input is accepted by the flip-flops on the posi­

5474DMQB

Abstract: 5474FMQB DM5474J DM5474W DM7474M DM7474N J14A M14A N14A
Contextual Info: , June 1989 5 4 7 4 /D M 5 4 7 4 /D M 7 4 7 4 Dual P o sitive-E dge-Triggered D Flip-Flops w ith Preset, Clear and C om p lem en tary O utputs General Description This device contains two independent positive-edge-trig­ gered D flip-flops with complementary outputs. The informa­

ic 356

Abstract: DM7474N 5474DMQB 5474FMQB DM5474J DM5474W DM7474 DM7474M J14A M14A
Contextual Info: S E M IC O N D U C T O R tm DM7474 Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs General Description This device contains tw o independent positive-edge-triggered D flip-flops with com plem entary o ut­ puts. T he inform ation on the D input is accepted by the

Contextual Info: National Semiconductor 5474/DM5474/DM7474 Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs General Description This device contains two independent positive-edge-trig­ gered D flip-flops with complementary outputs. The informa­

5474

Abstract: DM7474
Contextual Info: 5474,DM5474 5474/DM5474 Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs Literature Number: SNOS258B 5474 DM5474 DM7474 Dual Positive-Edge-Triggered D Flip-Flops with Preset Clear and Complementary Outputs General Description

DM7474N

Abstract: 5474 DM5474W DM7474 DM7474M J14A M14A 5474DMQB 5474FMQB DM5474
Contextual Info: 5474 DM5474 DM7474 Dual Positive-Edge-Triggered D Flip-Flops with Preset Clear and Complementary Outputs General Description This device contains two independent positive-edge-triggered D flip-flops with complementary outputs The information on the D input is accepted by the flip-flops on the positive going edge of the clock pulse The triggering occurs at a

100414DC

Abstract: 5401DM Fairchild dtl catalog fsa2719m 4727BPC FCM7010 FCM7004 937DMQB fairchild rtl FSA2501
Contextual Info: FAIRMONT ELECTRONICS PTY. LTD. TE L.48-6421 4 8 -6 4 8 1 /2 /4 C AB LES ' FAIRTRONICS' C R A IG H A L L T E L E X 8-3227 S A . P O .BOX 41102, C R A IG H A LL 2024. I ouani v-ox 39! 262Bramley 2018 FAIRCHILD 464 Ellis Street, M ountain View, C alifornia 94042

5474DMQB

Abstract: 5474FMQB DM5474J DM5474W DM7474 DM7474M DM7474N J14A M14A N14A
Contextual Info: R C H U - P S E M IC O N D U C T O R tm DM7474 Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs General Description This device contains tw o independent positive-edge-triggered D flip-flops w ith com plem entary o ut­

5474DMQB

Abstract: 5474FMQB DM5474 DM5474J DM5474W DM7474 DM7474M DM7474N J14A M14A
Contextual Info: 5474 DM5474 DM7474 Dual Positive-Edge-Triggered D Flip-Flops with Preset Clear and Complementary Outputs General Description This device contains two independent positive-edge-triggered D flip-flops with complementary outputs The information on the D input is accepted by the flip-flops on the positive going edge of the clock pulse The triggering occurs at a

74F160

Abstract: 54F162
Contextual Info: MOTOROLA M C 54F160A M C74F160A M C 54F162A M C74F162A SYNCHRONOUS PRESETTABLE BCD DECADE COUNTER PE CfcH Pn •R Uc Pi Pi p? — CET _ CP Th e M C54 7 4F150A and M C54/74F162A are high-speed syn ch ro n o u s decade co u n ters operating in the BCD 8421 sequence. T h e y are sy n ch ro n o u sly p resetta­

SN7441

Abstract: 54175 TFK 404 MM1402a equivalent SD300 N74141 SN7401 3 BB 4 SO 5 CON 6 RAY 7 CC 8 SI 9 RB 10 RG 11 VE
Contextual Info: NUMERICAL INDEX FUNCTIONAL INDEX SALES OFFICES Copyright 1974 S IG N E T IC S C O R P O R A T IO N Signetics Corporation reserves the right to make changes in the products contained in this book in order to improve design or performance and to supply the best possible product.