51C259L Search Results

Contextual Info: P U E L M M A m in t e i C 1P O C Q L LOW POWER 64Kx4 CHMOS DYNAMIC RAM 51C259L-12 120 0.1 Maximum Access Time ns Maximum CHMOS Standby Current (mA) 51C259L-15 150 51C259L-20 200 0.1 0.1 • TTL And HC Compatible Low Power Data Retention - Standby current, CHMOS — 100 /iA

c1609

Abstract: 198S 51C259L 51C259L-12 51C259L-15 51C259L-20 C1608 C1610
Contextual Info: P U E L M M h U Y in y 51C259L LOW POWER 6 4 K x 4 CHMOS DYNAMIC RAM 51C259L-12 51C259L-15 51C259L-20 120 0.1 150 200 0.1 Maximum Access Time ns Maximum CHMOS Standby Current (mA) 0.1 • TTL And HC Compatible Low Power Data Retention - standby current, CHMOS — 100

c1609

Abstract: 51C259L 51C259L-12 51C259L-15 51C259L-20 C1608 C1610 28003* intel
Contextual Info: [p^iUSMlDjNlÄiiW i n 51C259L LOW POWER 64K x 4 CHMOS DYNAMIC RAM y 51C259L-12 51C259L-15 51C259L-20 M aximum Access T im e ns 120 150 200 M aximum CHM OS Standby Current (mA) 0.1 0.1 0.1 TTL And HC Compatible Low Power Data Retention - Standby current, CHMOS — 100 /*A

Contextual Info: in te i 51C259L LOW POWER STATIC COLUMN 64K x 4 CHMOS DYNAMIC RAM 5 1 C 2 5 9 L -1 5 5 1 C 2 5 9 L -2 0 Maximum Access Time ns 15 0 200 Maximum CHM OS Standby Current (mA) 0.1 0.1 Low Power Data Retention - Standby current, CHMOS 10OfiA (max.) _ - Refresh period, RAS-Only - 32 ms (max.)

Contextual Info: PRELW ËM ARY in t e i c ip o c q i LOW POWER 64K x 4 CHMOS DYNAMIC RAM 51C259L-12 51C259L-15 51C259L-20 M axim um Access T im e ns 120 150 200 M axim um CHMOS Standby Current (mA) 0.1 0.1 0.1 Low Power Data Retention - Standby current, CHMOS — 100 /*A

Contextual Info: IF^iyßälDKlÄl^f i n t e i s i rO K Q I LOW POWER 64K x 4 CHMOS DYNAMIC RAM 5 1 C 2 59 L -1 S 5 1 C 2 5 9 L -2 0 Maximum Access Time ns 15 0 20 0 Maximum CHMOS Standby Current (mA) 0.1 0.1 Low Power Data Retention - Standby current, CHMOS 10O/xA (max.) _

KM41C464

Abstract: KM41C464-8 KM41C464-10 KM41C464-7 18PIN 51C259H-20 51C259HL-15 51C259HL-20 51C259L-15 51C259L-20
Contextual Info: 197 - 2 56 K A 4 s fi ît fi ¡SlSleffl CC TRAC max ns) CMOS Dynamic RAM (6 5 5 3 6 x 4 ) -s TRCY •in (ns) TCAD aiin (ns) TAH min (ns) TP min (ns) TYiCY ■in (ns) TDH min (ns) TRWC nin (ns) VDD or VCC I DD nax (V) (irA) 18P1N \ m m I DD STANDBY ( I S B / I SB2)

51C259L

Abstract: 51C259L-15 51C259L-20 C1608 C1609 C1610
Contextual Info: irrte1” 51C 259L LOW POWER STATIC COLUMN 64K x 4 CHMOS DYNAMIC RAM 5 1 C 2 5 9 L -1 5 51 C 2 5 9 L -2 0 150 200 0.1 0.1 Maximum Access Time ns Maximum CHMOS Standby Current (mA) Low Power Data Retention - Standby current, CHMOS 10 0 pA (max.) _ • Refresh period, RAS-Only - 32 ms (max.)