5116S Search Results

762T

Contextual Info: intei 5116S/L 2K x 8-BIT CMOS STATIC RAM 5116S-10 5116S-12 Unit Address Access Time ìa a 100 120 ns Chip Select Access Time (tAcs) 100 120 ns Output Enable Access Time (toE) 40 50 ns • Static Operation - No Clock/Refresh Required ■ Power Down Mode

5116S

Abstract: 5116S-10 5116S-12 N0303
Contextual Info: intei 5116S/L 2K x 8-BIT CMOS STATIC RAM 5 1 16S-10 5 1 16S-12 U n it Address A ccess Time t^A 100 120 ns Chip Select Access Tim e (tAcs) 100 120 ns O utput Enable Access Tim e (toE) 40 50 ns Static Operation — No Clock/Refresh Required Power Down Mode

Contextual Info: inte 5116S/L 2K x 8-BIT CMOS STATIC RAM 5116S-10 5116S-12 Unit Address Access Time t^A) 100 120 ns Chip Select Access Time (tAcs) 100 120 ns Output Enable Access Time (toE) 40 50 ns Static Operation — No Clock/Refresh Required Power Down Mode TTL Compatible

Contextual Info: 5116S FEATURES CMOS 16K 2K x 8 Static RAM PIN CONNECTIONS • 2,048 x 8 bit organization • Access time: 1000 ns (MAX.) • Low-power consumption: Operating: 33 mW (MAX.) Standby: 3.3 (MAX.) • Fully-static operation • Three-state outputs • Single +3 V power supply

LH5116S

Abstract: LH5116SN
Contextual Info: 5116S FEATURES CMOS 16K 2K x 8 Static RAM PIN CONNECTIONS • 2,048 × 8 bit organization • Access time: 1000 ns (MAX.) • Low-power consumption: Operating: 33 mW (MAX.) Standby: 3.3 µW (MAX.) • Fully-static operation • Three-state outputs • Single +3 V power supply

Contextual Info: FEATURES • 2,048 • Access time: 1000 ns MAX. • Low-power consumption: Operating: 33 mW (MAX.) Standby: 3.3 (MAX.) x 8 bit organization CM O S 16K (2K x 8) Static RAM DESCRIPTION The 5116S is a static RAM organized as 2,048 x 8 bits. It is fabricated using silicon-gate CMOS process

Contextual Info: 5116S FEATURES • 2,048 x 8 bit organization • Access time: 100 ns MAX. • Low power consumption: Operating: 33 mW (MAX.) Standby: 3.3 (MAX.) • j Fully static operation • Three-state outputs • Single +3 V power supply • Package: 24-pin, 450-mil SOP

Contextual Info: 5116S FEATURES CMOS 16K 2K x 8 Static RAM PIN CONNECTIONS • 2,048 x 8 bit organization 24 - PIN SOP TOP VIEW • Access time: 1000 ns (MAX.) • Low-power consumption: Operating: 33 mW (MAX.) Standby: 3.3 [iW (MAX.) • Fully-static operation • Three-state outputs

BR6116-100

Abstract: inverter welder schematic BR6116-45 CDM6116A-3 CMD6116-1 24PIN CDM6116A-9 CMB6116-2 UPD446 CDM6116
Contextual Info: - 48 - 16 K m % it £ ÍS KSI OC A TMC max ns) KAC max (ns) 4 CMOS - , TOE max (ns) TOH din (ns) * y TOD max (ns) y S t a t i c RAM (2 0 4 8 x 8 ) n m TtfP T U S itin min (n¡;) (as) TDH rain (ns) TfD (ns) Tffl max (ns) V D D or V C C (V) 24P I N 6 II A

LH5116S

Abstract: LH5116SN
Contextual Info: 5116S FEATURES CMOS 16K 2K x 8 Static RAM PIN CONNECTIONS • 2,048 × 8 bit organization • Access time: 1000 ns (MAX.) • Low-power consumption: Operating: 33 mW (MAX.) Standby: 3.3 µW (MAX.) • Fully-static operation • Three-state outputs • Single +3 V power supply

Contextual Info: 5116S FEATURES • 2,048 x 8 bit organization • Access time: 1000 ns MAX. • Low power consumption: Operating: 33 mW (MAX.) Standby: 3.3 (MAX.) CMOS 16K (2K x 8) Static RAM DESCRIPTION The 5116S is astatic RAM organized as 2,048 x 8 bits. It is fabricated using silicon-gate CMOS process

IC cs 4852

Abstract: dt6116 S0244
Contextual Info: INTEGRATE] DEVICE 3ÖE D • 4 Ö 2 S 7 7 1 G Q 0 Ö 1 4 1 =î « I D T _ - r - t u - 2 - V - l Z . IDT6116SA IDT6116LA CMOS STATIC RAM 1 6 K 2 K X 8 BIT) NOTICE SEE ORDER OF DATA FOR ERRATA IN FO RM AT IO N FEATURES: DESCRIPTION:

450-mil

Contextual Info: 5116S FEATURES CMOS 16K 2K x 8 Static RAM PIN CONNECTIONS • 2,048 x 8 bit organization 2 4 -P IN S O P T O P V IE W • Access time: 1000 ns (MAX.) • Fully-static operation • Three-state outputs Ag IZ • Package: 24-pin, 450-mil SOP DESCRIPTION

DS01003

Abstract: idt6116s GQ-01 MA5S771 IDT6116L s116l B-116S b116s
Contextual Info: INTEGRATE] DEVICE 3ÖE D • 4 Ö 2 S 7 7 1 G Q 0 Ö 1 4 1 =î « I D T _ - r - t u - 2 - V - l Z . IDT6116SA IDT6116LA CMOS STATIC RAM 1 6 K 2 K X 8 BIT) NOTICE SEE ORDER OF DATA FOR ERRATA IN FO RM AT IO N FEATURES: DESCRIPTION:

IR2E01

Abstract: LR4087 LZ8420M LZ9GG13 LI3160 IR2C36 LZ2423A SM8205 LZ9GG13M LR39901
Contextual Info: Index Model No. A R M 7 D C PU C o re B i-C M O S 1 28 4 0 ,4 2 C 62 IR 3 Y 1 2 A 50 LH1532 49 LH 531V 00 2.4 IR 2 E 2 8 62 IR 3 Y 1 4 50 LH1536 49 LH 532000B 3,4 IR 2 E 2 9 62 IR 3 Y 1 5 50 LH 1540A 49 L H 5 3 2 00 0 B -1 3,4 IR 2 E 3 0 62 IR 3 Y 1 6 50