4B2S Search Results

Contextual Info: 4B2S771 □ D2 b 3 ö i 4 T 7D CMOS PARALLEL FIFO 64 x 4-BIT AND 64 x 5-BIT Output Enable OE pin. The FIFOs accept 4-bit or 5-bit data at the data input (Do-D3,4 ). The stored data stack up on a firstin/first-out basis. A Shift Out (SO) signal causes the data at the next to last

Contextual Info: FAST CMOS 16-BIT BUS IDT54/74FCT16652T/AT/CT/ET IDT54/74FCT162652T/AT/CT/ET TRANSCEIVER/ REGISTERS In te g ra te d D ev ice T e c h n o lo g y , Inc. FEATURES: vices are organized as two independent 8-bit bus transceivers with 3-state D-type registers. For example, the xOEAB and

Contextual Info: ¡iii ICS K_i_^Bp*iBTjj lU fT O I 3 ICS1889 Integrated C ircuit System s, Inc. Advance Information 100Base-FX Integrated PHYceiver TM Features General Description The ICS1889 is a fully integrated physical layer device sup­ porting 100 Megabits per second CSMA/CD Fast Ethernet

74S381

Abstract: TTL 74S381 ALU 77 AB IDT7381
Contextual Info: INTEGRATED DEVICE 5AE D • 4025771 16-BIT CMOS CASCADABLE ALU ODlDflTl 27 3 ■ IDT IDT7381 IDT7383 Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • « • • The IDT7381 and IDT7383 are high-speed cascadable Arithmetic Logic Unit ALUs . Both three-bus devices have

IDT79R3000A

Abstract: 79R3000AE IDT79R3000 dwr2 D01113
Contextual Info: INTEGRATED DEVICE SflE D 4325771 0011120 534 • IDT RISC CPU PROCESSOR IDT79R3000A IDT79R3000AE Dynamically able to switch between Big- and Little-Endian byte ordering conventions. Coprocessor Interface— The IDT79R3000A generates all addresses and handles memory interface control for up to

Contextual Info: PRELIMINARY IDT70V06S/L HIGH-SPEED 3.3V 16Kx 8 DUAL-PORT STATIC RAM Integrated Device Technology, Inc. FEATURES: • True Dual-Ported memory cells which allow simulta­ neous reads of the same memory location • High-speed access — Commercial:25/35/55ns max.

Contextual Info: böE D • 4ÔE5771 DD1430E 052 I ID T INTEGRATED DEVICE PRELIMINARY IDT70V06S/L HIGH-SPEED 3.3V 16Kx 8 DUAL-PORT STATIC RAM Integrated Device Technology» Inc. FEATURES: • True D ual-P orted m em ory cells which allow sim ulta­ • • O n -ch ip port arbitration logic

t520c

Abstract: T29FC
Contextual Info: MULTILEVEL PIPELINE REGISTER IDT29FCT520A IDT29FCT520B IDT29FCT520C Integrated Device Technology, Inc* FEATURES: DESCRIPTION: • Equivalent to A M D 's A m 2 952 0 bipolar Multilevel Pipeline Register in pinout/function, speed and output drive over full tem perature and voltage supply extremes

sri01

Abstract: SRA-11 idt77201 dg2h
Contextual Info: 155 Mbps ATM SAR CONTROLLER FOR PCI-BASED NETWORKING APPLICATIONS PRELIMINARY INFORMATION IDT77201 Integrated Device Technology, Inc. KEY FEATURES DESCRIPTION • Full-duplex Segmentation and Reassembly SAR at 155 Mbps "wire-speed" (310 Mbps aggregate speed).

0B2M

Contextual Info: INTEGRATED DEVICE ^flE j _ 4025771 0014115 101 M I D T I PRELIMINARY IDT70261S/L HIGH-SPEED 16Kx 16 DUAL-PORT STATIC RAM Integrated Device Technology, Inc • FEATURES: • • • • • True Dual-Ported m em ory cells w hich allow sim ulta­ neous reads of the sam e m em ory location

Contextual Info: UtopiaFlFO 4-Port 128 x 9 x 4 Multiplexer-FIFO ADVANCE INFORMATION IDT77305 Integrated Device Technology, Inc. FEATURES: • • • • Four Independent Input 128 x9 FIFO Queues Nine bit wide input FIFOs Single selectable 9 or 18 bit output bus "UtopiaRx" or "UtopiaTx" Utopia compliant interface

Contextual Info: GENDAC 16-Bit Integrated Clock-LUT-DAC General Description Features The ICS5342 GENDAC is a combination of dual programma­ ble clock generators, a 256 x 18-bit RAM, and a triple 8-bit video DAC. The GENDAC supports 8-bit pseudo color appli­ cations, as well as 15-bit, 16-bit, and 24-bit True Color bypass

Contextual Info: INTEGRATED DEVICE 3flE D Q *4025771 QOOSGSa 2 S I D T r- HS-17 16-BIT CMOS ERROR DETECTION AND CORRECTION UNIT FEATURES IDT39C60 IDT39C60-1 IDT39C60A IDT39C60B • Standard Military Drawing #5962-88613 available for this function • Low-power CEMOS — Military: 100mA max.

IDT72245LB

Contextual Info: CMOS SyncFIFO 256 X 18, 512 X 18,1024 x 18, 2048 x 18 and 4096 x 18 ID T72205LB IDT72215LB ID T72225LB ID T72235LB ID T72245LB Integrated Device Technology, Inc. FEATURES: • • • • • • • • • • • • • 256 x 18-bit organization array 72205LB

AMD2960

Abstract: 2595D IDT39C60B IDT39C60 AM01B IDT39C60A
Contextual Info: INTEGRATED DEVICE SflE D 4025771 QGl[H3fl 034 • IDT IDT39C60 IDT39C60-1 IDT39C60A IDT39C60B 16-BIT CMOS ERROR DETECTION AND CORRECTION UNIT FEATURES • Standard Military Drawing #5962-88613 available for this function • Low-power CEMOS — Military: 100mA max.

Contextual Info: IME D 'i n t e g r a t e d d e v i c e 4Ô2S771 G0Q3Ô17 4 • ~ rfisSSSX ' ' ’ " integratedDeviceTechndogyInc. ■ •" V- ’ - 1 K x 18-BIT CMOS BiFlFO ~ ' FEATURES: • Bi-directional Flrst-In/Flrst Out FIFO memory • Back-to-back 1 K x 18-bit F IF O organization

S-6160

Contextual Info: INTEGRATE» DEVICE 14E D • 4025771 00037^7 5 ■ P¿.f PRELIMINARY IDT 7252 IDT 72520 1Kx 18-BIT- 2 K x 9-BIT CMOS BiFIFO T 'H f i - 3 5 system performance o f the peripheral Interface b y eliminating mismatched bus widths. Ttie BiFIFO can handle data transfer be­

SC 1044

Abstract: utaa
Contextual Info: INTEGRATED DEVICE bflE D • 4Ö2S771 DG14117 711 ■ IDT IDT7006S/L HIGH-SPEED 16Kx 8 DUAL-PORT STATIC RAM Integrated Device Technology, Inc. FEATURES: • • • • • • • • True Dual-Ported m em ory cells w hich allow sim ulta­ neous reads of the sam e m em ory location

Contextual Info: X X28HC256 256K p r 32K x 8 Bit 5 Volt, Byte Alterable E2PROM FEATURES DESCRIPTION * Access Time: 70ns * Simple Byte and Page Write — Single 5V Supply — No External High Voltages or V p p Control

Contextual Info: ISS'x FAST CMOS 20-BIT TRANSPARENT LATCHES IDT54/74FCT16841AT/BT/CT/ET IDT54/74FCT162841 AT/BT/CT/ET Integrated Device Technology, Inc. DESCRIPTION: FEA TU R E S: • Common features: - 0.5 MICRON CMOS Technology - High-speed, low-power CMOS replacement for

ce 2826

Contextual Info: INTEGRATED 47E D DE VIC E Integrated Device Technology, Inc. • MÔ2S771 G0102S4 SUBSYSTEMS “FLEXI-PAK ” FAMILY 32K x 16/32K x 16 CMOS SRAM/EEPROM MODULE T ■ IDT PRELIMINARY IDT7M7005 FEATURES: DESCRIPTION: • T h e ID T 7 M 70 05 is a high-speed, high-density C M O S

29B6

Contextual Info: ^EGRATED DEVI CE 5ÖE D 4Ô 257 71 QQ 11 5Û 7 CMOS STATIC RAM 64K 64K x 1-BIT TT? IDT7187S IDT7187L FEATURES: DESCRIPTION: • High speed (equal access and cycle tim e) — M ilitary: 20/25/3 5/45 /55/70/8 5ns (m ax.) — C om m ercia l: 15/20/25/35ns (m ax.)

Contextual Info: CMOS SyncFIFO 512x36, 1024x36, 2048 x 36 IDT723631 IDT723641 IDT723651 Integrated Device Technology, Inc. Advance information for the IDT723631 Final information for the IDT723641 Advance information for the IDT723651 • Output-Ready OR and Alm ost-Em pty (AE) flags syn­

Contextual Info: ICS2595 Ifcn Integrated Circuit Systems, Inc. User-Program m able Dual High-Perform ance Clock Generator Description Features The ICS2595 is a dual-PLL (phase-locked loop clock gener­ ator specifically designed for high-resolution, high-refresh rate, video applications. The video PLL generates any of 16