41KD Search Results

146R

Abstract: 146R-J 146R-W 41KD
Contextual Info: AT&T Data Sheet 146R Interrupt Holding Register Features • Up to four interrupt inputs per interrupt holding register ■ Cascadable inputs and outputs for expansion ■ Interfaced on either l/O-instructed or memorymapped basis ■ Convenient interface signals: AO, A1, E, IOR,

KD 502

Abstract: 146R 41KD 41KD-J 41KD-W ATT 41kd
Contextual Info: 41 K D Interrupt Holding R e gister Features • Up to four interrupt inputs per interrupt holding register Masking and interrupt registers may be read or written to verify operational integrity ■ Cascadable inputs and outputs for expansion TTL/CMOS-compatible

Contextual Info: fpAfcT Data Sheet 146R Interrupt Holding R egister Features • Up to four interrupt inputs per interrupt holding register ■ Cascadable inputs and outputs for expansion ■ Interfaced on either l/O-instructed or memorymapped basis ■ Convenient interface signals: AO, A1, E, IOR,

KD 502

Abstract: KD 3055 146R 41KD 41KD-J 41KD-W ATT Microelectronics
Contextual Info: i Data Sheet AT&T 4 1 KD In terru p t Holding R eg ister Features Up to four interrupt inputs per interrupt holding register Masking and interrupt registers may be read or written to verify operational integrity Cascadable inputs and outputs for expansion