416L Search Results

HMC416LP4

Contextual Info: 416LP4 / 416LP4E v02.0805 Typical Applications Features Low noise MMIC VCO w/Buffer Amplifier for: Pout: +4.5 dBm • Wireless Infrastructure Phase Noise: -114 dBc/Hz @100 k Hz • Industrial Controls No External Resonator Needed • Test Equipment Single Supply: 3V @ 37 mA

Contextual Info: 416LP4 / 416LP4E v02.0805 MMIC VCO w/ BUFFER AMPLIFIER, 2.75 - 3.0 GHz Typical Applications Features Low noise MMIC VCO w/Buffer Amplifier for: Pout: +4.5 dBm • Wireless Infrastructure Phase Noise: -114 dBc/Hz @100 k Hz • Industrial Controls No External Resonator Needed

Contextual Info: 416LP4 / 416LP4E v02.0805 MMIC VCO w/ BUFFER AMPLIFIER, 2.75 - 3.0 GHz Typical Applications Features Low noise MMIC VCO w/Buffer Ampliier for: Pout: +4.5 dBm • Wireless Infrastructure Phase Noise: -114 dBc/Hz @100 k Hz • Industrial Controls No External Resonator Needed

HMC416LP4

Abstract: RF POWER TRANSISTOR 2.7 ghz 3.1 ghz list part number
Contextual Info: 416LP4 / 416LP4E v02.0805 MMIC VCO w/ BUFFER AMPLIFIER, 2.75 - 3.0 GHz Typical Applications Features Low noise MMIC VCO w/Buffer Amplifier for: Pout: +4.5 dBm • Wireless Infrastructure Phase Noise: -114 dBc/Hz @100 k Hz • Industrial Controls No External Resonator Needed

47d-15

Contextual Info: STP3020 S un M ic r o e l e c t r o n ic s July 1997 SMC System Memory Controller DATA SHEET D e s c r ip t io n The STP3020 System M em ory controller SMC interfaces to an array of DRAM and VRAM SIMM s. It acceler­ ates graphics and im aging to m ain memory and fram e buffers. It also provides the interface for video I/O

82544EI

Abstract: NH82544EI 8254x Family of Gigabit Ethernet fw82544ei 82544EI register 1000BASE-LX 82544GC
Contextual Info: 82544EI Gigabit Ethernet Controller Networking Silicon Datasheet Product Features • ■ ■ ■ ■ ■ ■ ■ ■ ■ Full IEEE 802.3ab compliant — Auto-Negotiation of speed, duplex, and flow control configuration 32/64-bit 33/66 MHz, PCI Rev 2.2 compliant host interface

I-CUBE

Abstract: P103t zener diode phc 16 ZENER diode p317 AB P89 zener PLK3210 hk30 transistor 4287 AB zener phc 12 kck 223
Contextual Info: SH5 I-Cube* IQX Family Data Sheet Description Features The IQX family of SRAM-based bit-oriented switching devices is manufactured using a 0.6vim CMOS process. These devices offer clock speed of up to 150 MHz and fastest pin-to-pin delay of 6 ns. • SRAM-based, in-system programmable

RJP 3045

Abstract: Transistor z3p NP02 P104t str 1195 P022J I-CUBE iq P116C RP011 7805 v5
Contextual Info: M Ä ' I- C IQ Family Data Sheet u b e Features Description • Eight d evices ran gin g from 32 to 320 I / O Ports The IQ d evices are designed for use in sw itching and interconnect applications. In sw itching applications, these d evices are used to d ynam ically sw itch one or m ore signals. W hen

Contextual Info: Liteon Semiconductor Corporation LSP3308A 6 Channels LED Boost Driver „ FEATURES z z z z z z z z z z z z z z z z z „ GENERAL DESCRIPTION Six Constant-Current Output Channels Io=40mA each @ Vin=12V; Io=30mA each @ Vin=5V; Parallel Channels Allow Higher Current per LED

Contextual Info: IQX Family Data Sheet FEATURES DESCRIPTION • SRAM-based, in-system programmable • Switch Matrix — Non-Blocking — Identical and predictable delays — One-to-one, one-to-many and many-to-one connections The IQX family of SRAM-based bit-oriented switching devices is

TGW-R-5309-10

Abstract: T3-R-6308 TP201423 T3-46T08-LD stanag 3837 T3-4020-36LD T3-4120-36LD twinax M39029 MIL-STD-1553 cable connector T3-46T08
Contextual Info: DATA BUS CONNECTORS STORES M ANAGEM ENT CONNECTORS by P Y LE -N A TIO N A L MIL-STD-1553 Pyle-National has a long history as a quality manufacturer of circular, military specification connectors. From our connector series qualified to MIL-C-38999 Series III, Pyle has utilized

80486 ADDRESSING MODES EXAMPLES

Abstract: 82C55 PC416 PCI-416NTS acoustic sensor PCI-416 416H 16-STAGE
Contextual Info: s PCI-416 Ultra-Performance, Analog Input Boards for PCI Computers IN N O V A T IO N a n d E X C E L L E N C E FEATURES The ideal array-processor “front end” Up to 10MHz A/D sampling rates Choice of 1 2 ,14 or 16-bit A/D resolutions Wideband inputs with low harmonic distortion

p055 TRANSISTOR

Abstract: P029H H27 j1 3009 transistor P239 P239 9 318 ITT ZPY ZPY 91 ITT P109t P104t P182C
Contextual Info: & 1-Cube IQ Family Data Sheet Description Features The IQ devices are designed for use in switching and interconnect applications. In switching applications, these devices are used to dynamically switch one or more signals. When used in interconnect applications, the IQ devices

EK117

Abstract: EK119 23d14 sun SPARC 50 EL B17 D126D P3020
Contextual Info: STP3020 SPA RC T echrdogy Business Novem ber 1994 ST P 3020 DATA SHEET D System Memory Controller escription The STP3020 System Memory controller SMC interfaces to an array of DRAM and VRAM SIMMs. It accelerates graphics and imaging to main memory and frame buffers. It also provides the interface for

logic ic 7476 pin diagram

Abstract: H13003 datasheet and pin diagram of IC 7476 pin diagram for IC 7476 h13001 6H23 IDX110 R019h 7476 PIN DIAGRAM v63n
Contextual Info: Preliminary HD66781 720-channel Source Driver for a-Si TFT/Low Temperature Poly-Si TFT Panels with 262,144-color display RAM REJxxxxxxx-xxxxZ Rev.0.5 July.31.2003 • Index Description . 6

30343

Abstract: DRIVER 30374 30374 80486 ADDRESSING MODES EXAMPLES 30357 82C55 416b 490B 30444 PCI-30374
Contextual Info: ® PCI-416 Ultra-Performance, Analog Input Boards for PCI Computers FEATURES • • • • • • • • • • • NEW Hyperception The ideal array-processor “front end” Win95/NT Software Up to 10MHz A/D sampling rates Choice of 12, 14 or 16-bit A/D resolutions

416L

Abstract: 3AF6
Contextual Info: IQX Family Data Sheet FEATURES DESCRIPTION • SRAM-based, in-system programmable • Switch Matrix — Non-Blocking — Identical and predictable delays — One-to-one, one-to-many and many-to-one connections The IQX family of SRAM-based bit-oriented switching devices is

P009

Abstract: 7624k p055 TRANSISTOR P019
Contextual Info: IQX Family Data Sheet FEATURES DESCRIPTION • SRAM-based, in-system programmable • Switch Matrix — Non-Blocking — Identical and predictable delays — One-to-one, one-to-many and many-to-one connections The IQX family of SRAM-based bit-oriented switching devices is

TI Marking P272

Abstract: p135L mip283 L5106 ALI 3101 C I-CUBE iq P109t transistor P239 416L CA3125
Contextual Info: •Pt I - C u b IQX Family Data Sheet e m F eatures D e s c r ip t io n • SRAM-based, in-system programmable The IQX family of SRAM-based bit-oriented switching devices is • Switch Matrix manufactured using a 0.6nm CMOS process. These devices offer clock speeds of up to 133 MHz and pin-to-pin delay as low

QUAD D FLIP-FLOP

Abstract: enable40 IQX320 P089 marking IQX128B IQX160 IQX240B p005 ab 48 tag 91 IQX320-10PB416 gc153
Contextual Info: IQX Family Data Sheet FEATURES DESCRIPTION • SRAM-based, in-system programmable • Switch Matrix — Non-Blocking — Identical and predictable delays — One-to-one, one-to-many and many-to-one connections The IQX family of SRAM-based bit-oriented switching devices is

Contextual Info: EPSON SRM2AW416 LLBT1/7 4M-bit Static RAM • S u p e r Low Voltage Operation and Low C urrent Consumption •A c c e s s Tim e 100ns 1.8V / 70ns (2.2V) •2 6 2 ,1 4 4 W ords x 16-bit Asynchtonous • W id e Tem perature Range • DESCRIPTION The SRM2AW 41 6 LLBT 1/7 is a 262,144words x 16-bit asynchronous, random access memory on a monolithic

Contextual Info: "1 T l-C u b e IQX Family Data Sheet Features Description • SRAM-based, in-system programmable • Switch Matrix - Non-Blocking - Identical and predictable delays - One-to-one, one-to-many and many-toone connections • I/O Ports - Individually programmable as

Contextual Info: 1-Cube IQ Family Data Sheet Description Features • E ight d evices ra n g in g from 32 to 320 I / O P orts • SR A M -based P ro g ra m m in g for In-system R econfigurability • Sw itch M atrix A rchitecture • N on-blocking • P redictable & U niform D elays

LT1000

Abstract: IQ128B IQ160 IQ240B IQ320 IQ96B Ground bounce
Contextual Info: Ä> Technical Note Ground Bounce in the FPID Family 1.0 Introduction A shift in the in te rn al g ro u n d reference as a resu lt of o u tp u t sw itching is k n o w n as ground bounce. The effect of g ro u n d b ounce on the overall system o p e ratio n m u st b e con sid ered w h e n d esig n in g w ith h ig h sp e e d d igital ICs,