410PS Search Results

A 4503V

Abstract: CXB1100Q 4503V
Contextual Info: CXBÎIOOQ SONY. Quad 3-input OR/NOR Gate Description Pin Assignment The C X B 1 1 0 0 Q is an ultra high speed m onolithic E C L 1C, which contains fo u r 3-input O R/N O R gates. Features • T yp ical A C characteristics T pd= 410ps 02b T tlh = 2 1 0 p s

Contextual Info: 5V/3.3V DIFFERENTIAL DATA AND CLOCK D FLIP-FLOP SY10EP52V FINAL FEATURES • Guaranteed maximum frequency >4GHz ■ Guaranteed <410ps propagation delay over temperature ■ 3.3V and 5V power supply options ■ 75Ω internal input pulldown resistor ■ Wide operating temperature range: –40°c to +85°C

Contextual Info: 5V/3.3V DIFFERENTIAL DATA AND CLOCK D FLIP-FLOP FEATURES SY10EP52V DESCRIPTION • Guaranteed maximum frequency >4GHz ■ Guaranteed <410ps propagation delay over temperature ■ 3.3V and 5V power supply options ■ 75Ω internal input pulldown resistor ■ Wide operating temperature range: –40°c to +85°C

Contextual Info: 5V/3.3V DIFFERENTIAL DATA AND CLOCK D FLIP-FLOP FEATURES SY10EP52V DESCRIPTION • Guaranteed maximum frequency >4GHz ■ Guaranteed <410ps propagation delay over temperature ■ 3.3V and 5V power supply options ■ 75Ω internal input pulldown resistor ■ Wide operating temperature range: –40°c to +85°C

SY10EP52VZG-TR

Contextual Info: ECL Pro SY10EP52V 5V/3.3V DIFFERENTIAL DATA AND CLOCK D FLIP-FLOP Micrel, Inc. ECL Pro™ SY10EP52V FEATURES • Guaranteed maximum frequency >4GHz ■ Guaranteed <410ps propagation delay over temperature ■ 3.3V and 5V power supply options ■ 75Ω internal input pulldown resistor

SY10EP52V

Abstract: SY10EP52VKC SY10EP52VKCTR SY10EP52VZC SY10EP52VZCTR HEP52 SY10EP52VZG-TR
Contextual Info: ECL Pro SY10EP52V 5V/3.3V DIFFERENTIAL DATA AND CLOCK D FLIP-FLOP Micrel, Inc. ECL Pro™ SY10EP52V FEATURES • Guaranteed maximum frequency >4GHz ■ Guaranteed <410ps propagation delay over temperature ■ 3.3V and 5V power supply options ■ 75Ω internal input pulldown resistor

Contextual Info: CXBîlOOQ/Q-Y Sony. Quad 3-input OR/NOR Gate Description Pin Assignment The CXB1100Q is an ultra high speed monolithic ECL 1C, which contains four 3-input OR/NOR gates. 02j> D ie DIB DIA Q! 16 IS 01 n nn nn n Features 16 • Typical AC characteristics Tpd=410ps

4 flip flop

Contextual Info: ECL Pro SY10EP52V FINAL 5V/3.3V DIFFERENTIAL DATA AND CLOCK D FLIP-FLOP FEATURES • Guaranteed maximum frequency >4GHz ■ Guaranteed <410ps propagation delay over temperature ■ 3.3V and 5V power supply options ■ 75Ω internal input pulldown resistor

Contextual Info: ECL Pro SY10EP52V FINAL 5V/3.3V DIFFERENTIAL DATA AND CLOCK D FLIP-FLOP FEATURES • Guaranteed maximum frequency >4GHz ■ Guaranteed <410ps propagation delay over temperature ■ 3.3V and 5V power supply options ■ 75Ω internal input pulldown resistor

Contextual Info: ECL Pro SY10EP52V FINAL 5V/3.3V DIFFERENTIAL DATA AND CLOCK D FLIP-FLOP FEATURES • Guaranteed maximum frequency >4GHz ■ Guaranteed <410ps propagation delay over temperature ■ 3.3V and 5V power supply options ■ 75Ω internal input pulldown resistor

SY10EP52V

Abstract: SY10EP52VKI SY10EP52VKITR SY10EP52VZI SY10EP52VZITR
Contextual Info: 5V/3.3V DIFFERENTIAL DATA AND CLOCK D FLIP-FLOP FEATURES SY10EP52V FINAL DESCRIPTION • Guaranteed maximum frequency >4GHz ■ Guaranteed <410ps propagation delay over temperature ■ 3.3V and 5V power supply options ■ 75Ω internal input pulldown resistor

encoder 74175

Abstract: MV3506 MV3507A PCM encoder circuit DG22 DG28 MV3507 74175 chip digital telephone 600/IN5400+712
Contextual Info: MV3506/3507/3507A — CMOS MV3506 A-LAW CODEC WITH FILTER MV3507 /y-LAW CODEC WITH FILTER MV3507A //-LAW CODEC WITH FILTER AND A/B T h e M V 3506 and M V3507 are s ilic o n gate C M O S C o m p a n d in g E n c o d e r/D e c o d e r in te g ra te d c irc u its de s ig n e d

snr sfdr thd

Contextual Info: CLC5955 CLC5955 11-bit, 55MSPS Broadband Monolithic A/D Converter Literature Number: SNWS007A CLC5955 11-bit, 55MSPS Broadband Monolithic A/D Converter April 2002 N CLC5955 11-bit, 55MSPS Broadband Monolithic A/D Converter Features The CLC5955 is a monolithic 11-bit, 55MSPS analog-to-digital

BV-1 501

Abstract: BF-960 spice model LT1715 spice model Transistor TT 2246 cd 6283 ic transistor KF 507 LT1716 spice model COMP1016 lt6234 spice model AUO-11307 R01
Contextual Info: linear.txt SPICE MODELS - LINEAR Technology Corp. LTC1150 * Version 2.0 Copyright Linear Technology Corp. 10/19/05. All rights reserved. * .SUBCKT LTC1150 3 2 7 4 6 ; +IN -IN V+ V- OUT * INPUT IB1 2 7 -10P IB2 3 7 10P RD1 4 80 2122.1 RD2 4 90 2122.1 M1 80 2 12 12 PM1

idt8slvp12

Contextual Info: Low Phase Noise, 1-to-8, 3.3V, 2.5V LVPECL Output Fanout Buffer IDT8SLVP1208I DATASHEET General Description Features The IDT8SLVP1208I is a high-performance differential LVPECL fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. The

CL5956

Abstract: CLC5902 CLC5957 CLC5957MTD CLC5957PCASM
Contextual Info: CLC5957 12-bit, 70MSPS Broadband Monolithic A/D Converter October 1999 N CLC5957 12-bit, 70MSPS Broadband Monolithic A/D Converter General Description Features The CLC5957 is a monolithic 12-bit, 70MSPS analog-to-digital converter. The device has been optimized for use in IF-sampled

SY58029U

Abstract: SY89855U SY89855UMG SY89855UMGTR
Contextual Info: SY89855U Precision Low Power Differential LVPECL 4:1 MUX with 1:2 Fanout and Internal Termination General Description The SY89855U is a 2.5V/3.3V precision, high-speed, 4:1 differential multiplexer with 100K LVPECL 800mV compatible outputs, capable of handling clocks up to

Contextual Info: CLC5955 11-bit, 55MSPS Broadband Monolithic A/D Converter April 2002 N CLC5955 11-bit, 55MSPS Broadband Monolithic A/D Converter Features The CLC5955 is a monolithic 11-bit, 55MSPS analog-to-digital converter. The device has been optimized for use in IF-sampled

Contextual Info: Low Phase Noise, 1-to-8, 3.3V, 2.5V LVPECL Output Fanout Buffer 8SLVP1208 DATA SHEET General Description Features The 8SLVP1208 is a high-performance differential LVPECL fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. The 8SLVP1208 is

IDT8SLVP1208I

Contextual Info: 2:8, LVPECL Output Fanout Buffer IDT8SLVP1208I DATA SHEET General Description Features The IDT8SLVP1208I is a high-performance differential LVPECL fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. The

Contextual Info: SY89855U Precision Low Power Differential LVPECL 4:1 MUX with 1:2 Fanout and Internal Termination General Description The SY89855U is a 2.5V/3.3V precision, high-speed, 4:1 differential multiplexer with 100K LVPECL 800mV compatible outputs, capable of handling clocks up to

SY58029U

Abstract: SY89855U SY89855UMG SY89855UMGTR
Contextual Info: SY89855U Precision Low Power Differential LVPECL 4:1 MUX with 1:2 Fanout and Internal Termination General Description The SY89855U is a 2.5V/3.3V precision, high-speed, 4:1 differential multiplexer with 100K LVPECL 800mV compatible outputs, capable of handling clocks up to

Contextual Info: 1:8, LVPECL Output Fanout Buffer IDT8SLVP1208I DATA SHEET General Description Features The IDT8SLVP1208I is a high-performance differential LVPECL fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. The

CXB1100

Abstract: i1602 T4322
Contextual Info: SONY C O R P / C O M P O N E N T PRODS SDE 0302303 D 0003Ö31 3 «SONY CXB1100Q/Q-Y SO N Y , Quad 3-input O R /N O R Gate Description Pin Assignment T h e C X B 1 1 0 0 Q is a n ultra h ig h speed m o n o lith ic E C L IC, w h ich c o n ta in s fo u r 3-inp u t O R /N O R g ates.