40RAA Search Results

75115

Abstract: SN75116 z2035
Contextual Info: D iff Line Driver/Receiver 75116 NANDr-H PULL U P Z P L l ENABLE TERM RES R t SI INV INPUT B R S STROBE H contF-F G N D [J ★ + 5V W z7 ' ★ 1/2.75113+1/2.75115(9615 ★ f 7 > X ; 7 l - ' 7-t TTL ★ 3 X T — h ’ { iit l 1 1 6 /1 1 8 ' OUTPUTS INPUTS

SDL-3030

Contextual Info: ENGINEERING SPECIFICATIONS * T O T T O S I SANYO ELECTRONIC 5-JIS. T u l i T > I I t r i ' S 1 I, ELECTRIC CO. LTD. DEVICE DIVISION i n i-C lt 660 J i p í o Date: January 9, 1989 L A S E R D I ODE T y p e : S D L —3 0 3 0 —OO 1 * verified and distributed by Electronic Device Division, T o tto ri Sanyo

TC571024D-15

Abstract: A150 TC571024D-20 TC571024D-200
Contextual Info: 1 MEGA BIT 65,536 WORD x 16 BIT CMOS U.V ERASABLE AND ELECTRICALLY PROGRAMMABLE READ ONLY MEMORY ¡DESCRIPTION] The TC571024D is a 65,536 word x 16 bit CMOS ultraviolet light erasable and electrically programmable read only memory. The TC571024D is JEDEC standard p in configuration. This product is packaged in 40 pin

HJU7211

Abstract: NJU7211 NJU7211U
Contextual Info: s/ ^5 vg IÎÇ ia ia & n ¡St Cai 4r EE E& $ a- s» V m \ m ñ £d a m H a H n H <y> co o ^ } C O + + to U 1 to co Wl o tO o c5 o fto o*xt 1 > o op» tcn H o ¿ a- Pi » in m oc H oe< H 2 < >+ ED O o © Y ?" 711 n j |d © © f < § Ü -* z o cn oo O z

L0DB

Contextual Info: JRC N JU 7 O Ö 2E 3 P R E L I M I NARY DUAL LOW V O L T A G E C -M O S POWER A M P L I F I E R • GENERAL DESCRIPTION PACKAGE OUTLINE The NJU7Q82B is a dual C-MOS Power Anplifier which is available to operate with single power supply and low voltage. The NJU7Q82B realizes rail-to-rail operation with

Contextual Info: TA79L005P~TA79L024P BIPOLAR LINEAR INTEGRATED CIRCUIT SILICON MONOLITHIC O 5V, 9V, 12V, 15V 3-TERMINAL NEGATIVE VOLTAGE REGULATORS . Best suited to a power supply for TTL and C2 MOS • Built-in overcurrent protective circuit . Built-in thermal protective circuit