400TS Search Results
400TS Result Highlights (4)
| Part | ECAD Model | Manufacturer | Description | Download | Buy |
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| DS25BR400TSQ/NOPB | Texas Instruments | Quad 2.5 Gbps CML Transceiver withTransmit De-Emphasis and Receive Equalization 60-WQFN -40 to 85 |
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| DS15BR400TSQ | Texas Instruments | 4-Channel LVDS Buffer/Repeater with Pre-Emphasis 32-WQFN -40 to 85 |
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| DS15BR400TSQ/NOPB | Texas Instruments | 4-Channel LVDS Buffer/Repeater with Pre-Emphasis 32-WQFN -40 to 85 |
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| DS42BR400TSQ/NOPB | Texas Instruments | Quad 4.25-Gbps CML transceiver with transmit de-emphasis & receive equalization 60-WQFN -40 to 85 |
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400TS Price and Stock
KEMET Corporation C277LA54400TS2J4 UF 425V - Boxed Product (Development Kits) (Alt: C277LA54400TS2J) |
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C277LA54400TS2J | Box | 24 Weeks | 504 |
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Samtec Inc IDSS-07-D-14.00-T-S02- Bulk (Alt: IDSS-07-D-14.00-T-S02) |
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IDSS-07-D-14.00-T-S02 | Bulk | 1 |
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IDSS-07-D-14.00-T-S02 |
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IDSS-07-D-14.00-T-S02 |
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Samtec Inc IDMD-10-D-04.00-T-S02- Bulk (Alt: IDMD-10-D-04.00-T-S02) |
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IDMD-10-D-04.00-T-S02 | Bulk | 1 |
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IDMD-10-D-04.00-T-S02 |
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IDMD-10-D-04.00-T-S02 |
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Samtec Inc IDSD-06-S-04.00-T-ST8Ribbon Cable, IDC Receptacle to Free End, 12 Positions, 4 ", 101.6 mm, 2.54 mm, IDSD Series" - Bulk (Alt: IDSD-06-S-04.00-T-ST8) |
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| Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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IDSD-06-S-04.00-T-ST8 | Bulk | 1 |
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IDSD-06-S-04.00-T-ST8 | Bulk | 1 |
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IDSD-06-S-04.00-T-ST8 |
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IDSD-06-S-04.00-T-ST8 |
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Samtec Inc IDSD-08-S-24.00-T-ST4- Bulk (Alt: IDSD-08-S-24.00-T-ST4) |
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IDSD-08-S-24.00-T-ST4 | Bulk | 1 Weeks, 6 Days | 1 |
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IDSD-08-S-24.00-T-ST4 | Bulk | 1 |
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IDSD-08-S-24.00-T-ST4 | 1 |
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IDSD-08-S-24.00-T-ST4 |
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400TS Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
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Contextual Info: 1 MEG x 16 EDO DRAM |U|IC=RON MT4C1M16E5 MT4LC1M16E5 DRAM VrìfAlVl FEATURES • JEDEC- and industry-standard x l6 tim ing, functions, pinouts and packages • High-perform ance CM OS silicon-gate process • Single power supply +3.3V ±0.3V or 5V ±10% |
OCR Scan |
024-cycle 44/50-Pin | |
MT4LC1M16E5TG-6
Abstract: MT4C1M16E5 MT4LC1M16E5 1k 400
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MT4C1M16E5 MT4LC1M16E5 024-cycle 50nsSION MT4LC1M16E5TG-6 MT4C1M16E5 MT4LC1M16E5 1k 400 | |
MT4C1M16E5
Abstract: MT4LC1M16E5 MT4LC1M16E5TG-6 0241K
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MT4C1M16E5 MT4LC1M16E5 024-cycle MT4C1M16E5 MT4LC1M16E5 MT4LC1M16E5TG-6 0241K | |
MT4C1M16E5
Abstract: MT4LC1M16E5 MT4LC1M16E5TG-6 X3554 1k 400
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MT4C1M16E5 MT4LC1M16E5 024-cycle 50ns0, MT4C1M16E5 MT4LC1M16E5 MT4LC1M16E5TG-6 X3554 1k 400 | |
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Contextual Info: 1 MEG x 16 EDO DRAM DRAM MT4LC1M16E5 For the latest data sheet revisions, please refer to the Micron Web site: www.micron.com/mti/msp/html/datasheet.html FEATURES • JEDEC- and industry-standard x l6 timing, functions, pinouts and packages • High-performance CMOS silicon-gate process |
OCR Scan |
MT4LC1M16E5 024-cycle 44/50-Pin | |
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Contextual Info: MICRON' I 4 MEG x 16 E D O D R A lV l TECHNOLOGY, INC. n P A M MT4LC4M16R6 MT4LC4M16N3 U r iM IV I For the latest data sheet, please refer to the Micron Web site: www. micron, com/mti/msp/html/datasheet. html FEATURES PIN ASSIGNMENT Top View • Single +3.3V +0.3V power supply |
OCR Scan |
MT4LC4M16R6 MT4LC4M16N3 096-cycle 50-PlVl 50-PIN | |
MT4C1M16E5
Abstract: MT4LC1M16E5 MT4LC1M16E5TGS
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MT4C1M16E5 MT4LC1M16E5 024-cycle 44/50-Pin MT4C1M16E5 MT4LC1M16E5 MT4LC1M16E5TGS | |
Marking E5Contextual Info: 1 MEG x 16 EDO DRAM DRAM MT4LC1M16E5 For the latest data sheet revisions, please refer to the Micron Web site: www.micron.com/mti/msp/html/datasheet.html FEATURES PIN ASSIGNMENT Top View • JEDEC- an d in d u stry -sta n d a rd x l6 tim ing, functions, |
OCR Scan |
024-cycle MT4LC1M16E5 44/50-Pin Marking E5 | |
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Contextual Info: 1 MEG x 16 EDO DRAM M IC R O N I TECHNOLOGY, INC. DRAM MT4LC1M16E5 For the latest data sheet revisions, please refer to the Micron Web site: www.micron.com/mti/msp/html/datasheet.html FEATURES PIN ASSIGNMENT Top View • JEDEC- an d in d u stry -sta n d a rd x l6 tim ing, functions, |
OCR Scan |
024-cycle MT4LC1M16E5 44/50-Pin | |
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Contextual Info: EDcf DRAM TECHNOLOGY, INC. DRAM MT4LC4M16R6 For the latest data sheet revisions, please refer to the Micron Web site: www.micron.com/mti/msp/html/datasheet.html FEATURES PIN ASSIGNMENT Top View • Single +3.3V +0.3V power supply • Industry-standard x l6 pinout, timing, functions and |
OCR Scan |
MT4LC4M16R6 096-cycle 50-Pin | |
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Contextual Info: 1 MEG x 16 EDO DRAM MICRON I TECHNOLOGY, INC. n p A M MT4C1M16E5 MT4LC1M16E5 U r tM IV I FEATURES • JEDEC- and industry-standard xl6 timing, functions, pinouts and packages • High-performance CMOS silicon-gate process • Single pow er supply +3.3V +0.3V or 5V +10% |
OCR Scan |
MT4C1M16E5 MT4LC1M16E5 024-cycle 44/50-Pin | |
MT4LC4M16N3
Abstract: MT4LC4M16R6
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MT4LC4M16R6, MT4LC4M16N3 096-cycle 50-Pin MT4LC4M16N3 MT4LC4M16R6 | |
marking 1PC 6-pinContextual Info: 1 MEG x 16 EDO DRAM MICRON I TECHNOLOGY. INC. DRAM MT4C1M16E5 MT4LC1M16E5 FEATURES • JEDEC- and industry-standard xl6 timing, functions, pinouts and packages • High-performance CMOS silicon-gate process • Single power supply +3.3V ±0.3V or 5V ±10% |
OCR Scan |
MT4C1M16E5 MT4LC1M16E5 024-cycle marking 1PC 6-pin | |
MEM4X16E43VTW-5
Abstract: NS4249 MEM4X16E4 MEM4X16E43VTW5
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4X16E43V 096-cycle 50-Pin MEM4X16E43VTW-5 NS4249 MEM4X16E4 MEM4X16E43VTW5 | |
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Contextual Info: 4 MEG x 16 EDO DRAM MT4LC4M16R6 MT4LC4M16N3 DRAM For the latest data sheet, please refer to the Micron Web site: www.micron.com/mti/msp/html/datasheet.html FEATURES PIN ASSIGNMENT Top View • Single +3.3V ±0.3V power supply • Industry-standard x16 pinout, timing, functions and |
Original |
096-cycle MT4LC4M16R6 MT4LC4M16N3 50-Pin | |
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Contextual Info: 1 MEG x 16 EDO DRAM DRAM M T4LC 1M 16E5 For the latest data sheet revisions, please refer to the Micron Web site: www.micron.com/mti/msp/html/datasheet.html FEATURES PIN ASSIGNMENT Top View • JE D E C - a n d in d u stry -sta n d a rd x l 6 tim in g , fu n ctio n s, |
OCR Scan |
024-cycle 42-PIN | |
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Contextual Info: 1 M E G x 16 EDO DRAM V IIC Z R O N n P A V n * M M T4C 1M 16E 5 \ m M T4L C 1M 16E 5 FEATURES • JEDEC- and industry-standard x l6 tim ing, functions, pinouts and packages • High-perform ance CM OS silicon-gate process • Single pow er supply (+3.3V +0.3V or 5V ±10% |
OCR Scan |
024-cycle 44/50-Pin 42-Pin | |
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Contextual Info: 1 MEG x 16 EDO DRAM TECHNOLOGY, INC. MT4C1M16E5 MT4LC1M16E5 DRAM FEATURES • JEDEC- and industry-standard x16 timing, functions, pinouts and packages • High-performance CMOS silicon-gate process • Single power supply +3.3V ±0.3V or 5V ±10% • All inputs, outputs and clocks are TTL-compatible |
Original |
MT4C1M16E5 MT4LC1M16E5 024-cycle 44/50-Pin | |
mt4lc4m16r6Contextual Info: 4 MEG x 16 EDO DRAM MT4LC4M16R6 DRAM For the latest data sheet revisions, please refer to the Micron Web site: www.micron.com/mti/msp/html/datasheet.html FEATURES PIN ASSIGNMENT Top View • Single +3.3V +0.3V pow er supply • Industry-standard x l6 pinout, tim ing, functions and |
OCR Scan |
096-cycle MT4LC4M16R6 50-Pin mt4lc4m16r6 | |
mt4lc4m16r6Contextual Info: M IC R O N I 4 MEG x 16 EDO DRAM TECHNOLOGY, INC. DRAM MT4LC4M16R6 For the latest full-length data sheet, please refer to the Micron Web site: www.micron.com/mti/msp/html/ datasheet.html FEATURES PIN ASSIGNMENT Top View • Single +3.3V +0.3V power supply |
OCR Scan |
MT4LC4M16R6 096-cycle 50-pin mt4lc4m16r6 | |
TT-612Contextual Info: 1 MEG x 16 EDO DRAM MICRON I TECtWoLOBV. INC. DRAM M T4LC 1M 16E5 For the latest data sheet revisions, p/ease refer to the Micron Web site: www.micron.com/m ti/msp/htmi/da tasheet. h tmi FEATURES • JED EC- and industry-standard xl6 timing functions*, pinouts and packages |
OCR Scan |
024-cycle 44/50-Pin 42-PIN TT-612 | |
MT4LC4M16N3
Abstract: MT4LC4M16R6
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MT4LC4M16R6, MT4LC4M16N3 096-cycle 50-Pin MT4LC4M16N3 MT4LC4M16R6 | |