4-BIT EVEN PARITY CHECKER CIRCUIT DIAGRAM XOR Search Results

2594

Abstract: 4-bit even parity checker circuit diagram XOR
Contextual Info: \dt Integrated Device Technology, Inc. FEATURES • • • • • PRELIMINARY IDT73210/A/B IDT73211/A/B FAST CMOS OCTAL REGISTER TRANSCEIVER WITH PARITY 73210/211 Single-level pipeline register from Port A to Port B 73210 Two level pipeline register from Port B to Port A

IDT74ALVCH16903

Contextual Info: Integrated Device Technology, Inc. 3.3V CMOS 12-BIT UNIVERSAL BUS DRIVER WITH PARITY CHECKER, DUAL 3-STATE OUTPUTS AND BUSHOLD IDT74ALVCH16903 ADVANCE INFORMATION FEATURES: A buffered output-enable OE input can be used to place the 24 outputs and YERR in either a normal logic state (high

Contextual Info: DAC3482 SLAS748B – MARCH 2011 – REVISED SEPTERMBER 2011 www.ti.com Dual-Channel, 16-BIT, 1.25 GSPS Digital-to-Analog Converter DAC Check for Samples: DAC3482 FEATURES DESCRIPTION • The DAC3482 is a very low power, high dynamic range, dual-channel, 16-bit digital-to-analog converter

T0521

Abstract: 128KO
Contextual Info: DAC3482 SLAS748B – MARCH 2011 – REVISED SEPTERMBER 2011 www.ti.com Dual-Channel, 16-BIT, 1.25 GSPS Digital-to-Analog Converter DAC Check for Samples: DAC3482 FEATURES DESCRIPTION • The DAC3482 is a very low power, high dynamic range, dual-channel, 16-bit digital-to-analog converter

pari

Abstract: SN74ALVCH16903
Contextual Info: SN74ALVCH16903 3.3-V 12-BIT UNIVERSAL BUS DRIVER WITH PARITY CHECKER AND DUAL 3-STATE OUTPUTS SCES095C – MARCH 1997 – REVISED MAY 1998 D D D D D D D D Member of the Texas Instruments Widebus Family EPIC  Enhanced-Performance Implanted CMOS Submicron Process

b045701

Abstract: T0521-01
Contextual Info: DAC3484 SLAS749A – MARCH 2011 – REVISED JULY 2011 www.ti.com Quad-Channel, 16-Bit, 1.25 GSPS Digital-to-Analog Converter DAC Check for Samples: DAC3484 FEATURES DESCRIPTION • The DAC3484 is a very low power, high dynamic range, quad-channel, 16-bit

erc32 trap 0x61

Abstract: Cy7C601 ERC32 CB123 TSC691E TSC692E TSC693E tbr 3516 SPARC V7.0
Contextual Info: TSC691E Integer Unit User’s Manual for Embedded Real time 32–bit Computer ERC32 for SPACE Applications TSC691E Table of contents 1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1316D

Contextual Info: DAC34SH84 SLAS808 – FEBRUARY 2012 www.ti.com Quad-Channel, 16-Bit, 1.5 GSPS Digital-to-Analog Converter DAC FEATURES DESCRIPTION • The DAC34SH84 is a very low-power, high-dynamic range, quad-channel, 16-bit digital-to-analog converter (DAC) with a sample rate as high as

Contextual Info: DAC3482 www.ti.com SLAS748C – MARCH 2011 – REVISED JUNE 2012 Dual-Channel, 16-BIT, 1.25 GSPS Digital-to-Analog Converter DAC Check for Samples: DAC3482 FEATURES DESCRIPTION • The DAC3482 is a very low power, high dynamic range, dual-channel, 16-bit digital-to-analog converter

I960 mx

Abstract: 271194 marking A17 DIODE marking ED BDATA23 i960mx 27119
Contextual Info: In te l. MILITARY i960 MM/MX SUPERSCALAR MICROPROCESSOR Implements JIAWG 32-bit ISA Standard i960® MX Processor Only High-Performance 32-bit Superscalar Architecture — Up to Three Instructions per Clock Execution — Five Parallel Execution Units — Load/Store Architecture

ERC32

Abstract: CB123 CY7C601 TSC691E TSC692E TSC693E FPU-TSC692E erc32 trap 0x61 TMS 3529 A1191
Contextual Info: TSC691E Integer Unit User’s Manual for Embedded Real time 32–bit Computer ERC32 for SPACE Applications TSC691E Table of contents 1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Contextual Info: DAC3484 www.ti.com SLAS749C – MARCH 2011 – REVISED AUGUST 2012 Quad-Channel, 16-Bit, 1.25 GSPS Digital-to-Analog Converter DAC Check for Samples: DAC3484 FEATURES DESCRIPTION • The DAC3484 is a very low power, high dynamic range, quad-channel, 16-bit

Contextual Info: DAC3484 www.ti.com SLAS749C – MARCH 2011 – REVISED AUGUST 2012 Quad-Channel, 16-Bit, 1.25 GSPS Digital-to-Analog Converter DAC Check for Samples: DAC3484 FEATURES DESCRIPTION • The DAC3484 is a very low power, high dynamic range, quad-channel, 16-bit

pari

Abstract: SN74ALVCH16903 1A12A
Contextual Info: www.ti.com SN74ALVCH16903 3.3-V 12-BIT UNIVERSAL BUS DRIVER WITH PARITY CHECKER AND DUAL 3-STATE OUTPUTS FEATURES • • • • • • • • Member of the Texas Instruments Widebus Family EPIC™ Enhanced-Performance Implanted CMOS Submicron Process

1316A

Abstract: LTE baseband chip
Contextual Info: DAC34H84 SLAS751B – MARCH 2011 – REVISED SEPTEMBER 2011 www.ti.com Quad-Channel, 16-Bit, 1.25 GSPS Digital-to-Analog Converter DAC Check for Samples: DAC34H84 FEATURES DESCRIPTION • • • The DAC34H84 is a very low power, high dynamic range, quad-channel,

SN74ALVCH16903

Contextual Info: www.ti.com SN74ALVCH16903 3.3-V 12-BIT UNIVERSAL BUS DRIVER WITH PARITY CHECKER AND DUAL 3-STATE OUTPUTS FEATURES • • • • • • • • Member of the Texas Instruments Widebus Family EPIC™ Enhanced-Performance Implanted CMOS Submicron Process

Contextual Info: DAC34H84 www.ti.com SLAS751C – MARCH 2011 – REVISED AUGUST 2012 Quad-Channel, 16-Bit, 1.25 GSPS Digital-to-Analog Converter DAC Check for Samples: DAC34H84 FEATURES DESCRIPTION • • • The DAC34H84 is a very low power, high dynamic range, quad-channel,

SLK2511A

Contextual Info: SLK2511A OCĆ48/24/12/3 SONET/SDH MULTIRATE TRANSCEIVER SLLS610 − APRIL 2004 D Fully Integrated SONET/SDH Transceiver to D D D D D D D D Support Clock/Data Recovery and Multiplexer/Demultiplexer Functions Supports OC-48, OC-24, OC-12, Gigabit Ethernet, and OC-3 Data Rate With Autorate

4-bit even parity checker circuit diagram

Abstract: OC-24 SLK2701 SLK2721 SLK2721PZP S-PQFP-G100 Package powerPAD land pattern
Contextual Info: SLK2721 OC-48+FEC/24/12/3 SONET/SDH MULTIRATE TRANSCEIVER WITH ENHANCED JITTER TOLERANCE SLLS532 – JUNE 2002 D Fully Integrated SONET/SDH Transceiver to D D D D D D D D D Support Clock/Data Recovery and Multiplexer/Demultiplexer Functions Enhanced Jitter Tolerance Over SLK2701

S-PQFP-G100 Package example land pattern

Abstract: 4-bit even parity checker circuit diagram GR-253 OC-24 SLK2501 SLK25011PZP SLMA002 S-PQFP-G100 Package powerPAD land pattern
Contextual Info: SLK2501 OCĆ48/24/12/3 SONET/SDH MULTIRATE TRANSCEIVER SLLS502 – OCTOBER 2001 D Fully Integrated SONET/SDH Transceiver to D D D D D D D D Support Clock/Data Recovery and Multiplexer/Demultiplexer Functions Supports OC-48, OC-24, OC-12, Gigabit Ethernet and OC-3 Data Rate With Autorate

pari

Abstract: SN74ALVCH16903 74ALVCH16903
Contextual Info: www.ti.com SN74ALVCH16903 3.3-V 12-BIT UNIVERSAL BUS DRIVER WITH PARITY CHECKER AND DUAL 3-STATE OUTPUTS FEATURES • • • • • • • • Member of the Texas Instruments Widebus Family EPIC™ Enhanced-Performance Implanted CMOS Submicron Process

ERC32

Abstract: sparc v7 CB123 TSC691E TSC692E TSC693E erc32 trap 361-s SPARC V7.0
Contextual Info: TSC691E Integer Unit User’s Manual for Embedded Real time 32–bit Computer ERC32 for SPACE Applications TSC691E Table of Contents 1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

S-PQFP-G100 Package example land pattern

Abstract: SYNCHRONOUS ADDRESS MULTIPLEXER
Contextual Info: SLK2701 OCĆ48/24/12/3 SONET/SDH MULTIRATE TRANSCEIVER SLLS518 − DECEMBER 2001 D Fully Integrated SONET/SDH Transceiver to D D D D D D D D Support Clock/Data Recovery and Multiplexer/Demultiplexer Functions Supports OC-48, OC-24, OC-12, Gigabit Ethernet, and OC-3 Data Rate With Autorate

Contextual Info: DAC34H84 SLAS751B – MARCH 2011 – REVISED SEPTEMBER 2011 www.ti.com Quad-Channel, 16-Bit, 1.25 GSPS Digital-to-Analog Converter DAC Check for Samples: DAC34H84 FEATURES DESCRIPTION • • • The DAC34H84 is a very low power, high dynamic range, quad-channel,