4 PIN SINGLE-IN-LINE PACKAGE Search Results

ram 4256

Contextual Info: TM4256EC4 262,144 BY 4-BIT DYNAMIC RAM MODULE SEPTEMBER 1 985-R E VIS E D MAY 1988 2 6 2 ,1 4 4 T M 4256 E C 4 . . . C SINGLE-IN-LINE PACKAGE x 4 Organization Dynamic RAM Modules TOP VIEW Single 5-V Supply 110% Tolerance) 22-Pin Single-In-line Package (SIP)

Contextual Info: ADVANCE INFORMATION TM4256GP8, TM4256GV8 262,144 BY 8-BIT DYNAMIC RAM MODULES OCTOBER 1985 - R EV ISED NOVEMBER 1985 2 6 2 ,1 4 4 X 8 Organization V SINGLE-IN-LINE PACKAGE T ITOP VIEW Single 5-V Supply 1 0 % Tolerance) 30-Pin Single-in-Line Package (SIP)

4416-15

Abstract: TMS4416 mos memory data book
Contextual Info: • TM4416FE8 32,768 BY 8-BIT DYNAMIC RAM MODULE MOS LSI X 32,76S'X~fr~Organization £ JANUARY 1985- 24-PIN SINGLE-IN-LINE PACKAGE TOP VIEW Single + 5 -V Supply (1 0% Tolerance) 24-Pin Single^Ìn-Line Package (SIP) V d d (1) W (2) Utilizes Four 16K X 4 Dynamic RAMs in

Contextual Info: ADVANCE INFORMATION TM4256EQ5, TM4257EQ5 262,144 BY 5-BIT DYNAMIC RAM MODULES OCTOBER 1 9 8 5 - R EV ISED NOVEMBER 1985 2 6 2 ,1 4 4 X 5 Organization Q SINGLE-IN-LINE PACKAGE TOP VIEW Single 5-V Supply (10% Tolerance) 24-Pin Single-in-Line Package (SIP)

H11AA817

Abstract: H11A814 H11A817B H11AA814A H11AA814 3 pin phototransistor all datasheet phototransistor H11A817 H11A817C dual Phototransistor
Contextual Info: 4-PIN PHOTOTRANSISTOR OPTOCOUPLERS DESCRIPTION H11AA814 SERIES H11A817 SERIES The H11AA814 Series consists of two gallium arsenide infrared emitting diodes, connected in inverse parallel, driving a single silicon phototransistor in a 4-pin dual in-line package.

H11A817

Contextual Info: 4-PIN PHOTOTRANSISTOR OPTOCOUPLERS DESCRIPTION H11AA814 SERIES H11A817 SERIES The H11AA814 Series consists of two gallium arsenide infrared emitting diodes, connected in inverse parallel, driving a single silicon phototransistor in a 4-pin dual in-line package.

H11A817B

Abstract: H11A817A H11AA814 H11A817
Contextual Info: 4-PIN PHOTOTRANSISTOR OPTOCOUPLERS DESCRIPTION H11AA814 SERIES H11A817 SERIES The H11AA814 Series consists of two gallium arsenide infrared emitting diodes, connected in inverse parallel, driving a single silicon phototransistor in a 4-pin dual in-line package.

Contextual Info: TM4256EC4, TM4257EC4 262.144 BY 4-BIT DYNAMIC RAM MODULES SEPTEMBER 9 185 - REVISED NOVEMBER 198E C S IN G LE -IN LINE P AC K A G E 2 6 2 ,1 4 4 X 4 Organization TO P V IE W Single 5-V Supply <10% Tolerance) A8 22-Pin Single-in-Line Package (SIP) VDD D1

TMS4256

Abstract: 2S1201 TMS4256FML TMS4256 12NL TMS4256-20 4 bit dynamic ram 2600 dynamic ram
Contextual Info: ADVANCE INFORMATION TM4256HE4 524.288 BY 4-BIT DYNAMIC RAM MODULE SEPTEMBER 1985 - REVISED NOVEMBER 1985 E SINGLE-IN LINE PA C K A G E* 5 2 4 ,2 8 8 X 4 Organization TOP VIEW Single 5-V Supply (10% Tolerance) 24-Pin Single-in-Line Package (SIP) U tilizes Eight 2 S 6 K Dynam ic R A M s in

Contextual Info: February 1993 Semiconductor DM54155/DM74155 Dual 2-Line to 4-Line Decoders/Demultiplexers General Description These TTL. circuits feature dual 1-line-to-4-line demultiplex­ ers with Individual strobes and common binary-address in­ puts in a single 16-pin package. When both sections are

H11A817

Contextual Info: 4-PIN PHOTOTRANSISTOR OPTOCOUPLERS H11AA814 SERIES H11A817 SERIES DESCRIPTION H11AA814 SCHEMATIC The H11AA814 Series consists of two gallium arsenide infrared emitting diodes, connected in inverse parallel, driving a single silicon phototransistor in a 4-pin dual in-line package.

TMS4256FML

Abstract: tms4256 256Kx1 dRAM
Contextual Info: ADVANCE INFORMATION TM4256GP9, TM4256GV9 262.144 BY 9-BIT DYNAMIC RAM MODULES OCTOBER 1 9 8 5 - • 2 6 2 .1 4 4 X 9 Organization • Single 5-V Supply 10% Tolerance V SINGLE-IN-LINE PACKAG E f ITOP VIEW) 30-Pin Single-in-Line Package (SIP) —Pinned Module for Through-Hole

H11A817B

Abstract: H11AA814 all datasheet phototransistor 3 pin phototransistor dual Phototransistor H11A817C H11A817D H11AA814A H11A817 H11A817A
Contextual Info: 4-PIN PHOTOTRANSISTOR OPTOCOUPLERS H11AA814 SERIES H11A817 SERIES DESCRIPTION H11AA814 SCHEMATIC The H11AA814 Series consists of two gallium arsenide infrared emitting diodes, connected in inverse parallel, driving a single silicon phototransistor in a 4-pin dual in-line package.

TM4164EC4-12

Abstract: TM4164EC4-15 TM4164EC4-20 65536X4
Contextual Info: TM4164EC4 65,536 BY 4-BIT DYNAMIC RAM MODULE NOVEMBER 1983 - REVISED NOVEMBER 1985 65,536 X 4 Organization SINGLE-IN-LINE PACKAGE TOP VIEW Single 5-V Supply (10% Tolerance) 22-Pin Single-in-Llne Package (SIP) Utilizes Four 64K Dynamic RAMs in Plastic Chip Carrier

Contextual Info: 54LS155/DM54LS155/DM74LS155, 54LS156/DM54LS156/DM74LS156 Dual 2-Line to 4-Line Decoders/Demultiplexers General Description Features These TTL circuits feature dual 1-line-to-4-line demultiplex­ ers with individual strobes and common binary-address in­ puts in a single 16-pin package. When both sections are

TMS4256FML

Abstract: TMS4256 TMS4256-12 TMS4256-20 AZ31
Contextual Info: ADVANCE INFORMATION TM4256GP8, TM4256GV8 262,144 BY 8-BIT DYNAMIC RAM MODULES OCTOBER 1 9 8 5 - V SINGLE-IN-LINE PA C K A G Er 2 6 2 ,1 4 4 X 8 Organization TOP VIEW Single 5 -V Supply {1 0 % Tolerance) 30-Pin Single-in-Line Package (SIP) — Pinned Module for Through-Hole

Contextual Info: TM4164EC4 65,536 BY 4-BIT DYNAMIC RAM MODULE NOVEMBER 1983 - REVISED NOVEMBER 1985 SINGLE-IN-UNE PACKAGE 6 5 ,5 3 6 X 4 Organization TOP VIEW Single 5-V Supply (10% Tolerance) 22-Pin Single-in-Line Package (SIP) Utilizes Four 64K Dynamic RAMs in Plastic

IDT7MP4095

Contextual Info:  IDT7MP4095 128K x 32 CMOS STATIC RAM MODULE Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • High density 4 megabit static RAM module • Low profile 64-pin ZIP Zig-zag In-line vertical Package or 64-pin SIMM (Single In-line Memory Module)

DECODER

Abstract: 54LS155 54LS155DMQB 54LS155FMQB 54LS156 DM54LS155 DM54LS156 DM74LS155 DM74LS156 LS155
Contextual Info: 54LS155 DM54LS155 DM74LS155 54LS156 DM54LS156 DM74LS156 Dual 2-Line to 4-Line Decoders Demultiplexers General Description Features These TTL circuits feature dual 1-line-to-4-line demultiplexers with individual strobes and common binary-address inputs in a single 16-pin package When both sections are

74LS155

Abstract: DM74LS155N DM74LS155 DM74LS155M DM74LS156 DM74LS156M DM74LS156N M16A MS-001 N16E
Contextual Info: Revised April 2000 DM74LS155 • DM74LS156 Dual 2-Line to 4-Line Decoders/Demultiplexers General Description Features These TTL circuits feature dual 1-line-to-4-line demultiplexers with individual strobes and common binary-address inputs in a single 16-pin package. When both sections are

demultiplexer

Abstract: transmission-line
Contextual Info: DM54155/DM74155 Dual 2-Line to 4-Line Decoders/Demultiplexers General Description These TTL circuits feature dual 1-line-to-4-line demultiplexers with individual strobes and common binary-address inputs in a single 16-pin package. When both sections are enabled by the strobes, the

10LZ

Contextual Info: PARAdGM PDM4M4040 128K x 32 CMOS Static RAM Module Features Description □ High density 4 megabit Static RAM module □ Low profile 64-pin ZIP Zig-zag In-line vertical Package or 64-pin SIMM (Single In-line Memory Module) □ Fast access time: 12 ns (max.)

4045 RAM

Contextual Info: IDT7MP4045 IDT7MP4145 256K x 32 CMOS STATIC RAM MODULE DESCRIPTION: • High density 1 megabyte static RAM module IDT7MP4145 upgradeable to 4 megabyte, IDT7MP4120 • Low profile 64 pin ZIP (Zig-zag In-line vertical Package) or 64 pin SIMM (Single In-line Memory Module) for

Contextual Info: PARADIGM' PDM4M4040 128K x 32 CMOS Static RAM Module Features Description □ High density 4 megabit Static RAM module LI Low profile 64-pin ZIP Zig-zag In-line vertical Package or 64-pin SIMM (Single In-line Memory Module) □ Fast access time: 12 ns (max.)