3Y3 TRAN Search Results

vco 27MHz

Abstract: GO1525 GS7060 GS7062 dvbasi
Contextual Info: GS7062 DVB-ASI Serializer PRODUCT BRIEF DESCRIPTION • full DVB-ASI support The GS7062 is a DVB-ASI serializer. When used in conjunction with the GO1525 voltage controlled oscillator a DVB-ASI transmit solution can be realized. • 8b/10b coding • K28.5 sync word insertion

k 2996

Abstract: LT505 PLID resistor 240 3y3 transistor
Contextual Info: Low Current, Peak Limiting Class A Amplifier LT505 DATA SHEET FEATURES DESCRIPTION • amplifier current typically 53 µA The LT505 is a low current, low voltage monolithic integrated circuit amplifier. It is comprised of an operational amplifier driving a single transistor class A output stage with open

Contextual Info: HD74ALV C162244 16-bit Buffer / Driver with 3-state Outputs HITACHI ADE-205-204 Z Preliminary, 1st. Edition January 1998 Description The HD74ALVC162244 is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus oriented receivers and transmitters. The device can be used

Contextual Info: HD74ALV CH162244 16-bit Buffers / Drivers with 3-state Outputs HITACHI ADE-205-173 Z Preliminary, 1st. Edition December 1996 Description The HD74ALVCH162244 is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus oriented receivers and transmitters. The device can be used

Hitachi DSA002744

Contextual Info: HD74ALVC162244 16-bit Buffer / Driver with 3-state Outputs ADE-205-204 Z Preliminary, 1st. Edition January 1998 Description The HD74ALVC162244 is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus oriented receivers and transmitters. The device can be used

Contextual Info: HD74ALV CH16244 16-bit Buffers / Drivers with 3-state Outputs HITACHI ADE-205-133A Z 2nd. Edition July 1996 Description The HD74ALVCH16244 is designed specifically to improve both the performance and density of three state memory address drivers, clock drivers, and bus oriented receivers and transmitters. The device can be

Hitachi DSA002744

Contextual Info: HD74ALVCH16244 16-bit Buffers / Drivers with 3-state Outputs ADE-205-133B Z 3rd. Edition July 1997 Description The HD74ALVCH16244 is designed specifically to improve both the performance and density of three state memory address drivers, clock drivers, and bus oriented receivers and transmitters. The device can

HD74ALVC162244

Abstract: Hitachi DSA0015
Contextual Info: HD74ALVC162244 16-bit Buffer / Driver with 3-state Outputs ADE-205-204 Z Preliminary 1st. Edition January 1998 Description The HD74ALVC162244 is designed specifically to improve both the performance and density of 3state memory address drivers, clock drivers, and bus oriented receivers and transmitters. The device

HD74ALVCH16244

Abstract: Hitachi DSA00226
Contextual Info: HD74ALVCH16244 16-bit Buffers / Drivers with 3-state Outputs ADE-205-133C Z 4th. Edition December 1999 Description The HD74ALVCH16244 is designed specifically to improve both the performance and density of three state memory address drivers, clock drivers, and bus oriented receivers and transmitters. The device can be

Hitachi DSA002744

Contextual Info: HD74ALVCH162244 16-bit Buffers / Drivers with 3-state Outputs ADE-205-173A Z Preliminary 2nd. Edition January 1998 Description The HD74ALVCH162244 is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus oriented receivers and transmitters. The device can be

GS1540

Abstract: GS1515 GS1522 GS1545
Contextual Info: HD-LINX Optimizing PLL in Noisy Environments INFORMATION NOTE BUILT-IN DIAGNOSTIC FEATURES The GS1515 HDTV Reclocker, GS1522 HDTV Serializer, GS1540 Non-Equalizing Receiver, and GS1545 Equalizing Receiver are high performance, low power PLL based integrated circuits for HD-SDI Transmit and Receive

Contextual Info: SN74ALVC16240 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS JA N U A R Y 1993 Member of the Texas Instruments Widebus Family DGG OR DL PACKAGE TOP VIEW 1ÖE[ 1Y1 [ 2 1Y2 [ 3 Designed to Facilitate Incident Wave Switching for Line Impedances of 50 Q or Greater

Contextual Info: SN74ALVC16244 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS JANUARY 1993 Designed to Facilitate Incident Wave Switching for Line Impedances of 50 i l or Greater Typical Vqlp Output Ground Bounce < 0.8 V at Vcc = 3.3 V, Ta = 25°C Typical V qhv (Output V0 h Undershoot)

HD74ALVCH162244

Abstract: Hitachi DSA00226
Contextual Info: HD74ALVCH162244 16-bit Buffers / Drivers with 3-state Outputs ADE-205-173A Z Preliminary 2nd. Edition January 1998 Description The HD74ALVCH162244 is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus oriented receivers and transmitters. The device can be used

transistor c101

Abstract: pspice model GS9007 R840 GENNUM 14 PIN
Contextual Info: Pspice Model of GS9007 Cable Driver Output APPLICATION NOTE INTRODUCTION This application note describes a Pspice® model of the output of the GENLINX GS9007 cable driver. The model is intended to assist the designer in using the GS9007 as a transmission

HD74ALVC162244

Abstract: Hitachi DSA00226
Contextual Info: HD74ALVC162244 16-bit Buffer / Driver with 3-state Outputs ADE-205-204 Z Preliminary 1st. Edition January 1998 Description The HD74ALVC162244 is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus oriented receivers and transmitters. The device can be used

Contextual Info: I I SN74ALVC16244 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS SCAS250- JANUARY 1993- REVISED JANUARY 1994 DGQ OR DL PACKAGE TOP VIEW • Member of the Texas Instruments Widebus Family • EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process • Designed to Facilitate Incident-Wave

2A337

Abstract: 74AC16244
Contextual Info: 54AC16244, 74AC16244 16-BIT BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS T I0180— 0 3 4 6 5 , MARCH 1990 54A C 16244 . . . WO PACKAGE 74AC16244 . . . DL PACKAGE Member of the Texas Instruments Widebus’* Family TOP VIEW Packaged in Shrink Small Outline 300-mil

CDC318A

Contextual Info: CDC318A 1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS614 – SEPTEMBER 1998 D D D D D D D D D D DL PACKAGE TOP VIEW High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM (SDRAM) Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps

SN74ALVC16240

Contextual Info: SN74ALVC16240 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS SCAS415 - JANUARY 1993 - REVISED MARCH 1994 Member of the Texas Instruments Wldebus Family EPIC ™ Enhanced-Performance Implanted CMOS Submicron Process Designed to Facilitate Incident-Wave Switching for Line Impedances of 50 Q

rx6a

Abstract: RD5A RD5B rx6b 3RP10 HDR40RAM RX9b RD6A RD6B RD11A
Contextual Info: AD9860: DUT Left/Right Symbolic DNI C23 0⍀ J5 R103 OP184 0⍀ R102 1 N1 –IN 2 4 –V 7 +V 5 N2 +IN 3 6 OUT U11 U11 5VA JP78 JP77 JP76 1 DNI 5VA 3 C19 2 0.1␮F 0⍀ AVDD_DAC R27 0⍀ R101 DNI DNI + C6 10␮F 10V TxN_B TxP_B TxP_A TxN_A 4.02k⍀ C96 0.1␮F

HD74ALVCH16244

Contextual Info: HD74ALVCH16244 16-bit Buffers / Drivers with 3-state Outputs REJ03D0050-0500Z Previous ADE-205-133C(Z Rev.5.00 Oct.02.2003 Description The HD74ALVCH16244 is designed specifically to improve both the performance and density of three state memory address drivers, clock drivers, and bus oriented receivers and transmitters. The device can be

CDC318

Contextual Info: CDC318 1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS587B – JANUARY 1997 – REVISED MARCH 1998 D D D D D D D D D DL PACKAGE TOP VIEW High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM (SDRAM) Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps

CDC318

Contextual Info: CDC318 1-LINE TO 18-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS587B – JANUARY 1997 – REVISED MARCH 1998 D D D D D D D D D DL PACKAGE TOP VIEW High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM (SDRAM) Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps