39S16800T Search Results

9633E

Abstract: 3107E-01 3520E-11 805E-01 853e HYB39S64800T max 8734E 1600E-03 SIEMEMS transistor 702E
Contextual Info: INFORMATION NOTE IBIS MODELS FOR SIEMENS DRAM and SDRAMs 9.96 InfIBIS.DOC IBIS MODELS I/O-Buffer Information Specification IBIS Behavioral IBIS is an emerging standard for electronic behavioral specifications of digital integrated circuit input/output (I/O) analog characteristics. IBIS

SS35L

Abstract: smd marking YB Q67100-Q1244 AAFL1
Contextual Info: SIEM EN S 16 MBit Synchronous DRAM Preliminary Information • High Performance: CAS latency = 3 -10 -12 Units fCK 100 83 MHz tCK3 10 12 ns tAC3 8 10 ns • Multiple Burst Operation Read • Autom atic Com mand • Data M ask for Read / W rite control x4, x8

3165805AT-60

Abstract: Q67100
Contextual Info: SIEMENS Summary of Types in Alphanumerical Order Summary of Types in Alphanumerical Order Ordering Code Page HYB 3116160BSJ-50 on request 618 HYB 311616QBSJ-60 on request 618 HYB 3116160BSJ-70 on request 618 HYB 3116160BST-50 on request 618 HYB 3116160BST-60

Contextual Info: SIEMENS 16 MBit Synchronous DRAM Preliminary Information • High Performance: CAS latency = 3 -10 -12 Units fCK 100 83 MHz tCK3 10 12 ns tAC3 8 10 ns Multiple Burst Read with Operation Automatic Command and Controlled Single Write Precharge Data Mask for Read / Write control x4, x8

39S16800AT-8

Abstract: smd marking m11 Q67100-Q1323 Q67100-Q1333 Q67100-Q1335 39S16800T 39S16800AT-10 smd marking code M11 smd code m6
Contextual Info: 16 MBit Synchronous DRAM second generation HYB 39S16400/800/160AT-8/-10 Advanced Information • High Performance: CAS latency = 3 • Multiple Burst Read with Single Write Operation -8 -10 Units fCK 125 100 MHz • Automatic and Controlled Precharge Command