32KX36 Search Results

IBM0418A11NLAA

Abstract: IBM0436A11NLAA
Contextual Info: . Preliminary IBM0436A11NLAA IBM0418A11NLAA 32Kx36 & 64Kx18 SRAM Features • 32Kx36 or 64Kx18 organizations • Registered Outputs • 0.25 Micron CMOS technology • 30 Ohm Drivers • Synchronous Pipeline Mode of Operation with Self-Timed Late Write • Common I/O

Contextual Info: WM Y32K36V-XTQX WHITE /MICROELECTRONICS a 32Kx36 M onolithic Flow Through Synchronous SRAM advanced* FEATURES • Fast Access Times of 10 and 11 ns ■ ■ Fast O E Access Time of 7ns ■ W rite Pass-through Capability ■ Packaging: ■ Clock Controlled, Registered, Address, Data and Control

Contextual Info: ^EDI _EDI82236C Electronic D«signs Inc. High Performance Synchronous Static RAM 32Kx36 Monolithic Synchronous Static RAM D iF il^ T 0 © i Features The EDI82236C is a 1,179,648 bit synchronous Static 32Kx36 bit Synchronous Static RAM designed to support high performance cache memory Random Access Memory

Contextual Info: KM736V599A/L 32Kx36 Synchronous SRAM Document Titie 32Kx36-Bit Synchronous Pipelined Burst SRAM, 3.3V Power Datasheets for 100TQFP Revision History Rev.No. History Draft Date Remark Rev.0.0 Initial draft Feb. 18. 1997 Preliminary Rev.1.0 Final spec release

Contextual Info: KM732V599A/L 32Kx32 Synchronous SRAM Document Titie 32Kx36-Bit Synchronous Pipelined Burst SRAM, 3.3V Power Datasheets for 100TQFP Revision History Rev. No. History Draft Date Remark R ev.0.0 Initial dra ft Feb. 18. 1997 P relim inary R e v.1.0 Final spe c release

IBM0418A1ANLAA

Abstract: IBM0436A1ANLAA
Contextual Info: . IBM0418A1ANLAA IBM0436A1ANLAA 32Kx36 & 64Kx18 SRAM Preliminary Features • 32K x 36 or 64K x 18 organizations • Common I/O • 0.25µ CMOS technology • 30Ω Drivers • Synchronous Register-Latch Mode of Operation with Self-Timed Late Write • Asynchronous Output Enable and Power Down

Contextual Info: KM736V587 32Kx36 Synchronous SRAM Document Title 32Kx36-Bit Synchronous Burst SRAM, 3.3V Power Datasheets for 100TQFP Revision History Rev.No. History Draft Date Remark Rev. 0.0 Initial dra ft Nov. 02. 1996 P relim inary Rev. 1.0 Final spe c release M ay. 27. 1997

Contextual Info: PRELIMINARY 32Kx32 Synchronous SRAM KM732V599A/L Document Title 32Kx36-Bit Synchronous Pipelined Burst SRAM, 3.3V Power Datasheets for 100TQFP Revision History Rev. No. History Draft Date Remark Rev.0.0 Initial draft Feb. 18. 1997 Preliminary Rev.1.0 Final spec release

KM736V595A

Contextual Info: PRELIMINARY KM736V595A/L 32Kx36 Synchronous SRAM Document Title 32Kx36-Bit Synchronous Pipelined Burst SRAM, 3.3V Power, 2.5V I/O Datasheets for 100TQFP Revision History Rev. No. History Draft Date Remark Rev.0.0 Initial draft Feb. 18. 1997 Preliminary Rev.1.0

KM736V587-8

Abstract: CQ-113
Contextual Info: PRELIMINARY KM736V587 32Kx36 Synchronous SRAM 32Kx36 Bit Synchronous Burst SRAM FEATURES GENERAL DESCRIPTION. • Synchronous Operation. • On-Chip Address Counter. • Write Self-Timed Cycle. • On- Chip Address and Control Registers. • Single 3.3V± 5% Power Supply.

KM736V587-10

Abstract: KM736V587-8 KM736V587-9
Contextual Info: PRELIMINARY KM736V587 32Kx36 Synchronous SRAM Document Title 32Kx36-Bit Synchronous Burst SRAM, 3.3V Power Datasheets for 100TQFP Revision History Rev . No. History Draft Date Remark Rev. 0.0 Initial draft Nov. 02. 1996 Preliminary Rev. 1.0 Final spec release

Contextual Info: KM736V595A/L 32Kx36 Synchronous SRAM Document Titie 32Kx36-Bit Synchronous Pipelined Burst SRAM, 3.3V Power, 2.5V I/O Datasheets for 100TQFP Revision History Rev. No. History Draft Date Remark Rev.0.0 Initial draft Feb. 18. 1997 Preliminary Rev.1.0 Final spec release

Contextual Info: PRELIMINARY KM736V587 32Kx36 Synchronous SRAM 32Kx36 Bit Synchronous Burst SRAM FEATURES GENERAL DESCRIPTION. • Synchronous Operation. • On-Chip Address Counter. • Write Self-Timed Cycle. • On- Chip Address and Control Registers. • Single 3.3V± 5% Power Supply.

Contextual Info: a W M YP32K36V-XTQX WHITE /MICROELECTRONICS 32Kx36 Monolithic Pipelined Synchronous SRAM AD VAN CED * FEATURES • Fast Access Times of 8 and 10ns ■ Industrial and M ilitary Temperature Ranges ■ Fast O E Access Time of 7ns ■ W rite Pass-through Capability

Contextual Info: = = = ¥ = = = r= 7 = IB M 0 4 3 6 1 1 R L A IB M 0 4 1 8 1 1 R L A Preliminary 32KX36&64KX18SRAM Features • 32K x 36 or 64K x 18 Organizations • 0.5 Micron CMOS Technology • Synchronous Pipeline Mode Of Operation with Self-Timed Late Write • Single Differential PECL Clock compatible with

7411 truth table

Contextual Info: Preliminary KM736V599A/L 32Kx36 Synchronous SRAM 32K x 36 - Bit Synchronous Pipelined Burst SRAM FEATURES GENERAL DESCRIPTION • Synchronous Operation. • 2 Stage Pipelined operation with 4 Burst • On-Chip Address Counter. • Self-Timed Write Cycle. • On- Chip Address and Control Registers.

Contextual Info: Preliminary KM736V599A/L 32Kx36 Synchronous SRAM 32K X 36 - Bit Synchronous Pipelined Burst SRAM FEATURES GENERAL DESCRIPTION • Synchronous Operation. • 2 Stage Pipelined operation with 4 Burst • On-Chip Address Counter. • Self-Timed Write Cycle. • On- Chip Address and Control Registers.

MC68B21CP

Abstract: xcm916x1cth16 transistor marking code 12W SOT-23 sg379 MC68B54P XC68HC805P18CDW mc68b50cp MC2830 NE555N CHN NE555N
Contextual Info: SG379/D REV 7 Semiconductor Products Sector NORTH AMERICA SALES AND DISTRIBUTION PRICE LIST THIS BOOK IS IN COMPUTER SORT PRODUCT CLASSIFICATION – Please see General Information Section 1.3 EFFECTIVE DATE: JANUARY 10, 1998 General Information 1 Cross References

STP5111

Contextual Info: S un M ic r o e l e c t r o n ic s July 1997 UltraSPARC -! CPU Module DATA SHEET 200 MHz UltraSPARC-1 + 1 MB E-Cache + UDBs D e s c r ip t io n The UltraSPARC-1 module is a high performance, SPARC V9 compliant, small form factor processor module, which interfaces to the UltraSPARC Port Architecture UPA interconnect bus.

LXXXXXXXX

Abstract: TNC 24 mk 2 026R CY7C09569V tb136 A14L CY7C09579V
Contextual Info: «oaHaoooiMMMWfMMMMMM!9:^ v’*'» -• -■ -■ -^ jjÉBT *¿f5’00“’ '*'^ 7“T ■ ■ ■ ■ <1; .r {• o CY7C09569V CY7C09579V PRELIMINARY f:,ò b 3.3V 16K/32K x 36 FLEx36 Synchronous Dual-Port Static RAM • 3.3V Low o p e ratin g p ow er

723653

Abstract: 72V7290 72V3613 72V7250 72V3611 72V3623 72V72100 72V7230 72V7240 72V7260
Contextual Info: Selector Guide for FIFO Memory Products • Synchronous FIFOs SuperSync II, SuperSync™ SyncFIFO™, DualSync™ • Bi-Directional Synchronous FIFOs • Asynchronous FIFOs the leading provider of FIFO memories. July’00 IDT FIFO Memory Products Quick Reference Guide

Contextual Info: V CYPRESS CY7C056V CY7C057V PRELIMINARY 3.3V 16K/32K x 36 FLEx36 Asynchronous Dual-Port Static RAM Features True dual-ported m em ory cells which allow sim ulta­ neous access of the same m em ory location 16K x 36 organization CY7C056V 32K x 36 organization (CY7C057V)

723653

Abstract: BI 7284 72V7250 72V72100 72V7230 72V7240 72V7260 72V7270 72V7280 72V7290
Contextual Info: Selector Guide for FIFO Memory Products • Synchronous FIFOs SuperSync II, SuperSync™ SyncFIFO™, DualSync™ • Bi-Directional Synchronous FIFOs • Asynchronous FIFOs the leading provider of FIFO memories. Jan’00 IDT FIFO Memory Products Quick Reference Guide

SA82A

Abstract: IBM043610ULAB4M SA73A
Contextual Info: IBM043610ULAB4M x 1612/10, 3.3VMMDM15DSU-021044922. Preliminary IBM041810ULAB IBM043610ULAB 32K X 36 & 64K X 18 SRAM Features • 32K x 36 or 64K x 18 Organizations • 0.45 Micron CMOS Technology • Synchronous Flow Thru Mode of Operation with Self-Timed Late Write