encoder/decoder
Abstract: COIC5130A nd 32 COic5127 1295125-01
Contextual Info: COic5130A Specifications Preliminary Device Specification t = 0 to 10, 320Mbs, Introduction Programmable Reed-Solomon The COic5130A contains both a high data rate programmable Error Correction Encoder and Decoder Reed-Solomon encoder and a separate decoder that will process
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coic5130a320mbscoic5127acoic5128a+4encoder/decodernd 32coic51271295125-01
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R3500 MIPS
Abstract: MIPS R2000 MIPS Translation Lookaside Buffer TLB R3000 MQUAD tag27 IDT79R3000 IDT79R3500 R2000 R2000 mips processor R3000
Contextual Info: IDT79R3500 RISC CPU PROCESSOR RISCore MILITARY AND COMMERCIAL TEMPERATURE RANGES IDT79R3500 RISC CPU PROCESSOR RISCore Integrated Device Technology, Inc. • Supports concurrent refill and execution of instructions. • Partial word stores executed as read-modify-write.
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idt79r3500r3000r3010r3000a+10r2000r2010175-pinr3500 mipsmips r2000mips translation lookaside buffer tlb r3000mquadtag27idt79r3000r2000 mips processor
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MQUAD
Abstract: R3500 mips r2000 cache r2000 processor tag27 IDT79R3000 IDT79R3500 R2000 R2010 R3000
Contextual Info: IDT79R3500 RISC CPU PROCESSOR RISCore MILITARY AND COMMERCIAL TEMPERATURE RANGES IDT79R3500 RISC CPU PROCESSOR RISCore Integrated Device Technology, Inc. • Supports concurrent refill and execution of instructions. • Partial word stores executed as read-modify-write.
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idt79r3500r3000r3010r3000a+8r2000r2010mquadr3500 mipsr2000 cacher2000 processortag27idt79r3000
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FLOATING POINT Co Processor
Contextual Info: IDT79R3500 RISC CPU PROCESSOR RISCore Integrated Device Technology, Inc. FEATURES: • • • • • • • S upp orts con curre nt refill and execution of instructions. Partial w ord stores exe cuted as re ad-m odify-w rite. 6 external interrupt inputs, 2 softw a re interrupts, w ith
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idt79r350064-entry161-pin160-pin+3172-pin79r3500floating point co processor
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79R3500
Abstract: R3500 mips S-5017 MIPS Translation Lookaside Buffer TLB R3000 IDT79R3000A MIPS r3000 R2010 mips processor R2000 mips processor
Contextual Info: RISC CPU PROCESSOR RISCore IDT79R3500 Integrated Device Technology, Inc. FEATURES: • Efficient Pipelining— The CPU's 5-stage pipeline design assists in obtaining an execution rate approaching one instruction per cycle. Pipeline stalls and exceptions are
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idt79r3500256kbs64-entrymil-std-883+11161-pin160-pin172-pin79r3500r3500 mipss-5017mips translation lookaside buffer tlb r3000idt79r3000amips r3000r2010 mips processorr2000 mips processor
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