31JAN2006 Search Results

Contextual Info: TLV3501 TLV3502 SBOS321D − MARCH 2005 − REVISED JULY 2005 4.5ns Rail-to-Rail, High-Speed Comparator in Microsize Packages FEATURES D D D D D D D DESCRIPTION HIGH SPEED: 4.5ns RAIL-TO-RAIL I/O SUPPLY VOLTAGE: +2.7V to +5.5V PUSH-PULL CMOS OUTPUT STAGE SHUTDOWN TLV3501 only

Contextual Info: TPS715xx Actual Size 2,15 mm x 2,3 mm www.ti.com SLVS338L – MAY 2001 – REVISED SEPTEMBER 2005 50 mA, 24 V, 3.2 µA Supply Current Low-Dropout Linear Regulator in SC70 Package FEATURES APPLICATIONS • • • • • • • • • • • • • 24-V Maximum Input Voltage

ST19NA18

Abstract: stmicroelectronics eeprom AES-128 RSA 24
Contextual Info: ST19NA18 Smartcard MCU with MAP, IART, High Speed CPU Clock & 18 KBytes High Density EEPROM Data Brief Features summary ST19NA18 applications include: • Pay TV, Banking and Secure applications Hardware and dedicated software ■ ■ ■ ■ ■ ■ ■ ■

SaTCR-1

Abstract: SATCR1 SaTCR-2 diseqc 1.0 twin lnb 1A56H SaTCR-1 equivalent DiSEqC 1.0 / 1.1 AN2035 AN2036
Contextual Info: ST7LNB1Y0 DiSEqC slave microcontroller for SaTCR based LNBs and switchers Features • Clock, reset and supply management – Reduced power consumption – Safe power on/off management by low voltage detector LVD – Internal 8 MHz oscillator ■ Communication interface

Contextual Info: STEVAL-IFP002V1 High Side Driver - 8 Channel based on VN808 Data Brief Features p Application conforms to: IEC 61000-4-4 4kV , IEC 61000-4-5 (2kV), IEC 61000-4-6 (10kV) p 16 output channels up to 0.5A per channel p 16 digital inputs & 2 digital output p Decoupling power & microcontroller section by

Contextual Info: M65KG512AB 512Mbit 4 Banks x 8M x 16 1.8V supply, DDR Low Power SDRAM Features • 512Mbit Synchronous Dynamic RAM – Organized as 4 Banks of 8MWords, each 16 bits wide ■ Double Data Rate (DDR) – 2 Data Transfers/Clock cycle – Data Rate: 332Mbit/s max. for 6ns speed

OPA134

Abstract: PCM1725 PCM1725D PCM1725DG4 PCM1725DR PCM1725U
Contextual Info: PCM1725 PCM 172 5 Stereo Audio DIGITAL-TO-ANALOG CONVERTER 16 Bits, 96kHz Sampling TM FEATURES DESCRIPTION ● COMPLETE STEREO DAC: Includes Digital Filter and Output Amp The PCM1725 is a complete low cost stereo audio digital-to-analog converter DAC , operating off of a

SC70-6

Abstract: OMAP2420 OPA355 OPA358 OPA360 OPA361
Contextual Info: OPA361 SBOS334A − SEPTEMBER 2005 − REVISED JANUARY 2006 3V VIDEO AMPLIFIER with Internal Gain and Filter in SC70 FEATURES D D D D DESCRIPTION EXCELLENT VIDEO PERFORMANCE INTERNAL GAIN: 5.2V/V SUPPORTS TV-DETECTION COMPATIBLE WITH OMAP242x and DAVINCIE PROCESSORS

VISHAY BC 150

Abstract: HDU10 HBU15
Contextual Info: H.U Vishay Draloric Ceramic High Voltage Disc Capacitors, Class 1 DESIGN: s max. Dmax. Disc capacitors with epoxy coating RoHS e max. RATED VOLTAGE UR: 1 kVDC 2 kVDC 3 kVDC 4 kVDC 5 kVDC 6 kVDC L HAU HBU HCU HDU HEU HFU COMPLIANT F±1 V ± 0.5 DIELECTRIC STRENGTH BETWEEN LEADS:

M65KA512AB

Contextual Info: M65KA512AB 512Mbit 4 Banks x 8M x 16 , 133 MHz Clock Rate, Bare Die, 1.8 V Supply, Low Power SDRAM Features • 512 Mbit Synchronous Dynamic Ram – Organized as 4 Banks of 8 Mwords, each 16 bits wide ■ Supply voltage – VDD = 1.7 to 1.9 V (1.8 V typical in

spru301

Contextual Info: TMS320C6727, TMS320C6726, TMS320C6722 Floating-Point Digital Signal Processors www.ti.com SPRS268C – MAY 2005 – REVISED NOVEMBER 2005 1 TMS320C6727, TMS320C6726, TMS320C6722 DSPs 1.1 • • • • • • Features C672x: 32-/64-Bit 300-MHz Floating-Point DSPs

Contextual Info: TPA3100D2 HTQFP QFN www.ti.com SLOS469C – OCTOBER 2005 – REVISED DECEMBER 2005 20-W STEREO CLASS-D AUDIO POWER AMPLIFIER FEATURES APPLICATIONS • • • • • • • • • • • • 20-W/ch into an 8-Ω Load From a 18-V Supply 10-W/ch into an 8-Ω Load From a 12-V Supply

Contextual Info: M65KA512AB 512Mbit 4 Banks x 8M x 16 , 133MHz Clock Rate, Bare Die, 1.8V Supply, Low Power SDRAM Feature summary • 512Mbit Synchronous Dynamic Ram – Organized as 4 Banks of 8MWords, each 16 bits wide ■ Supply voltage – VDD = 1.7 to 1.9V (1.8V typical in

LMV821DCKR

Abstract: LMV821DCKT LMV822 LMV822D LMV824 LMV821 LMV821DBVR LMV821DBVT
Contextual Info: LMV821 SINGLE, LMV822 DUAL, LMV824 QUAD LOW-VOLTAGE RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS www.ti.com FEATURES • • • • • • • 2.5-V, 2.7-V, and 5-V Performance –40°C to 125°C Operation No Crossover Distortion Low Supply Current at VCC+ = 5 V:

Contextual Info: 7 8 THIS DRAWING IS UNPUBLISHED. C COPYRIGHT 2007 RELEASED FOR PUBLICATION 6 5 4 3 2 2007 LOC AD ALL RIGHTS RESERVED. BY - 1 REVISIONS DIST 00 P LTR D DESCRIPTION DATE REVISED PER ECO-13-002771 DWN APVD KH 22FEB2013 RP 7 5 X Y FINISHED HOLE SIZE AND PLATED THRU HOLES

104 Ceramic Disc Capacitors

Abstract: HDU10
Contextual Info: H.U Vishay Draloric Ceramic High Voltage Disc Capacitors, Class 1 DESIGN: s max. Dmax. Disc capacitors with epoxy coating RoHS e max. RATED VOLTAGE UR: 1 kVDC 2 kVDC 3 kVDC 4 kVDC 5 kVDC 6 kVDC L HAU HBU HCU HDU HEU HFU COMPLIANT F±1 V ± 0.5 DIELECTRIC STRENGTH BETWEEN LEADS:

TLC555

Abstract: TLC555MFKB TLC555MJG TLC555MJGB TLC555Q 5962-8950301 of monostable timer NE555 tlc555id
Contextual Info: TLC555 LinCMOS TIMER SLFS043F − SEPTEMBER 1983 − REVISED FEBRUARY 2005 D Very Low Power Consumption D D D D D GND TRIG OUT RESET 8 2 7 3 6 4 5 VDD DISCH THRES CONT FK PACKAGE TOP VIEW NC TRIG NC OUT NC 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13

M65KG512AB

Contextual Info: M65KG512AB 512Mbit 4 banks x 8 Mb x 16 1.8 V supply, DDR low power SDRAM Features • 512Mbit Synchronous Dynamic RAM – Organized as 4 banks of 8 Mwords, each 16 bits wide ■ Double Data Rate (DDR) – 2 Data Transfers/Clock cycle – Data Rate: 332 Mbit/s max. for 6ns speed

SBOS313B

Abstract: LOG112 OPA132 OPA2381 OPA300 OPA335 OPA350 OPA354 OPA355 OPA380
Contextual Info: OPA381 OPA2381 SBOS313B − AUGUST 2004 − REVISED NOVEMBER 2004 Precision, Low Power, 18MHz Transimpedance Amplifier FEATURES DESCRIPTION D OVER 250kHz TRANSIMPEDANCE D D D D D D D D D D D D The OPA381 family of transimpedance amplifiers provides 18MHz of Gain Bandwidth GBW , with extremely high

LMV931

Abstract: LMV931IDBVR LMV931IDBVT LMV931IDCKR LMV931IDCKT LMV932 LMV932IDGKR LMV934
Contextual Info: LMV931 SINGLE, LMV932 DUAL, LMV934 QUAD 1.8-V OPERATIONAL AMPLIFIERS WITH RAIL-TO-RAIL INPUT AND OUTPUT www.ti.com SLOS441G – AUGUST 2004 – REVISED FEBRUARY 2006 FEATURES • • • • • • • LMV931 . . . DBV SOT-23-5 OR DCK (SC-70) PACKAGE

Contextual Info: STD60NF55LA N-channel 55 V, 0.012 Ω, 60 A DPAK STripFET II Power MOSFET Features • Order code VDSS RDS on ID STD60NF55LA 55V <0.015Ω 60A Low threshold drive 3 1 Applications ■ Switching application ■ Automotive DPAK Description This Power MOSFET has been developed using

Contextual Info: ST7LNB1Y0 DiSEqC slave microcontroller for SaTCR based LNBs and switchers Features • Clock, reset and supply management – Reduced power consumption – Safe power on/off management by low voltage detector LVD – Internal 8 MHz oscillator ■ Communication interface

A115-A

Abstract: LMV341 LMV341IDBVR LMV342 LMV344
Contextual Info: LMV341, LMV342, LMV344 RAIL-TO-RAIL OUTPUT CMOS OPERATIONAL AMPLIFIERS WITH SHUTDOWN www.ti.com FEATURES • • • • • • • • • • • 2.7-V and 5-V Performance Rail-to-Rail Output Swing Input Bias Current…1 pA Typ Input Offset Voltage…0.25 mV Typ

HDU10

Abstract: HCU1 HBU15
Contextual Info: H.U Vishay Draloric Ceramic High Voltage Disc Capacitors, Class 1 DESIGN: s max. Dmax. Disc capacitors with epoxy coating RoHS e max. RATED VOLTAGE UR: 1 kVDC 2 kVDC 3 kVDC 4 kVDC 5 kVDC 6 kVDC L HAU HBU HCU HDU HEU HFU COMPLIANT F±1 V ± 0.5 DIELECTRIC STRENGTH BETWEEN LEADS: