30A03 Search Results

FCH30A03L

Abstract: A03L
Contextual Info: SBD T y p e : FCH30 FCH30A0 30A03L A03L OUTLINE DRAWING FEATURES *TO-220AB Case *Fully Molded *Dual Diodes – Cathode Common *Low Forward Voltage Drop *High Surge Capability *Tj=150 °C operation Maximum Ratings Rating Approx Net Weight: 1.75g Symbol 30A03L

30A03L

Abstract: A03L FCH30A03L
Contextual Info: SBD T y p e : FCH30 FCH30A0 30A03L A03L OUTLINE DRAWING FEATURES *TO-220AB Case *Fully Molded *Dual Diodes – Cathode Common *Low Forward Voltage Drop *High Surge Capability *Tj=150 °C operation Maximum Ratings Rating Approx Net Weight: 1.75g Symbol 30A03L

Contextual Info: SBD T y p e : FCH30 FCH30A0 30A03L A03L OUTLINE DRAWING FEATURES *TO-220AB Case *Fully Molded *Dual Diodes – Cathode Common *Low Forward Voltage Drop *High Surge Capability *Tj=150 °C operation Maximum Ratings Rating Approx Net Weight: 1.75g Symbol 30A03L

Contextual Info: Commercial SRAM Products 256Kx8, 25 - 70ns, DIP 30A036-01 C 2 Megabit High Speed CMOS SRAM DPS256S8AP DESCRIPTION: The DPS256S8AP is a high speed 256K x 8 high-density, low-power static RAM module comprised of two high speed ceramic 128K x 8 monolithic SRAM’s, an advanced high-speed CMOS

Dense-Pac Microsystems

Abstract: DPS128X32XJ3 32-256K
Contextual Info: Military SRAM Products 128Kx8, 15 - 35ns, LCC/JLCC 30A037-01 B 4 Megabit High Speed CMOS SRAM DPS128X32XJ3 ADVANCED INFORMATION DESCRIPTION: The DPS128X32XJ3 is a 128K x 8 “J” Leaded Ceramic Surface Mount Module. It contains four individual 128K x 8 SRAMs, packaged in their own hermetically

A03L

Contextual Info: SBD T y p e : FCH30 FCH30A0 30A03L A03L OUTLINE DRAWING FEATURES *TO-220AB Case *Fully Molded *Dual Diodes – Cathode Common *Low Forward Voltage Drop *High Surge Capability *Tj=150 °C operation Maximum Ratings Rating Approx Net Weight: 1.75g Symbol 30A03L

Contextual Info: Militay SRAM Products 128Kx8, 15 - 35ns, LCC/JLCC 30A037-01 B 1 Megabit High Speed CMOS SRAM DPS128M8En DESCRIPTION: The DPS128M8En is a very high speed 128K x 8 Static Random Access Memory SRAM fabricated with a CMOS silicon gate process. The memory utilizes

p 32 lcc 300 r

Abstract: 32-PIN Dense-Pac Microsystems
Contextual Info: 30A03 7-01 B DENSE FAC 1 Megabit High Speed CM O S SRAM MICROSYSTEMS DPS128M8En PRELIMINARY DESCRIPTION: The DPS128M8En is a very high speed 12 8 K x 8 Static Random Access M em ory SRAM fabricated w ith a CMOS silicon gate process. The memory utilizes asynchronouscircuitryand may be maintained in any

30021

Abstract: L48C L41C IC L44C DATASHEET L30C l31c L43C ORSO42G5 ORSO82G5 ORT42G5
Contextual Info: ORCA ORSO42G5 and ORSO82G5 0.6 - 2.7 Gbps SONET Backplane Interface FPSCs August 2005 Data Sheet Introduction Lattice has extended its family of high-speed serial backplane devices with the ORSO42G5 and ORSO82G5 devices. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the ORSO42G5 and

Contextual Info: 3 0A 0 3 7-01 B DENSE-PAC 1 Megabit High Speed CMOS SRAM DPS128M8En MICROSYSTEMS PRELIMINARY DESCRIPTION: The DPS128M8En is a very high speed 128K x 8 Static Random Access Memory SRAM fabricated with a CMOS silicon gate process. The memory utilizes asynchronouscircuitryand may be maintained in any

Contextual Info: • DPS128M8 I V i Pense-Pac Microsystems, Inc. 128K X 8 CMOS SRAM MONOLITHIC PRELIMINARY DESCRIPTION: The DPS128M8-70, -85, -10, -12, -15 is a 128k X 8 Static Random Access Memory SRAM fabricated on a monolithic CMOS chip. It is designed for use in high density, high speed, low power applications. All

Contextual Info: D PS5 1 2 S8 P 512KX8 CMOS SRAM MODULE DESCRIPTION: T h e D P S 512 S 8P is a 5 1 2K X 8 high-density, low-power static RAM module comprised of four 12 8 K X 8 m o no lithic S R A M 's, an advanced high-speed C M O S d e co d er and deco up ling capacitors surface mounted on a co-fired ceramic

Contextual Info: DPS256S8AN Dense-Pac Microsystems, Inc. O HIGH SPEED MILITARY 256K X 8 CMOS SRAM MODULE ADVANCED INFORMATION DESCRIPTION: The DPS256S8AN is a high speed military 256K X 8 high-density, low-power static RAM module comprised of two high speed ceramic 128K X 8 monolithic

Contextual Info: □PM DPS256S8P Dense-Pac Microsystems, Inc. 256K X 8 CMOS SRAM MODULE O DESCRIPTION: The D P S256 S8P is a 256K X 8 high-density, low-power static RAM module comprised of two 1 2 8 K X 8 m o no lithic SR A M 's, an advanced high-speed C M O S d e co d er and deco upling

AD30102

Abstract: E3P15
Contextual Info: ORCA ORT42G5 and ORT82G5 06 to 3.7 Gbits/s XAUI and FC FPSCs March 2004 Data Sheet Introduction Lattice Semiconductor has developed a family of next generation FPSCs intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the

ORCA ORT42G5

Contextual Info: ORCA ORT42G5 and ORT82G5 3.7 Gbits/s XAUI and 4.25 Gbits/s FC FPSCs November 2003 Data Sheet Introduction Lattice Semiconductor has developed a family of next generation FPSCs intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the

AL437

Abstract: L97c L235C L103T L41C L140C L94C l165c L239C L43C
Contextual Info: ORCA ORSPI4 Dual SPI4 Interface and High-Speed SERDES FPSC November 2003 Preliminary Data Sheet Lattice Semiconductor has developed a next-generation FPSC targeted at high-speed data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the ORSPI4 FPSC contains two

L67c

Abstract: L41C l44c L71C l75c transistor l57c IC L44C DATASHEET l31c L47c l51c
Contextual Info: ORCA ORT42G5 and ORT82G5 06 to 3.7 Gbits/s XAUI and FC FPSCs February 2004 Data Sheet Introduction Lattice Semiconductor has developed a family of next generation FPSCs intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the

Contextual Info: Dense-Pac Microsystems, Inc. ^ O DPS128M8 CERAMIC 128K X 8 CMOS SRAM MONOLITHIC DESCRIPTION: The D PS128M 8 is a m o n o lith ic 128K X 8 Static Random Access M em o ry SRAM fabricated using C M O S technology. It is designed fo r use in high density, high speed, lo w po w e r applications. All pins

Contextual Info: □PM 4 Megabit High Speed CM OS SRAM Dense-Pac Microsystems. Inc. ^ DPS512S8AP DESCRIPTION: The D P S51 2 S8 A P is a high speed 512K X 8 high-density, low-power static RAM module comprised of four 128K X 8 monolithic SRAM's, an advanced high-speed CM OS decoder and decoupling capacitors

Contextual Info: DENSE-PAC MICROSYSTEMS 1 Megabit High Speed CMOS SRAM DPS128M8En PRELIM INARY DESCRIPTION: The DPS128M8En is a very high speed 128K x 8 Static Random Access Memory SRAM fabricated with a CMOS silicon gate process. The memory utilizes asynchronous circuitry and may be maintained in any

Contextual Info: DENSE-PAC MICROSYSTEMS 2 Megabit CMOS SRAM DPS256S8P/DPS256S8PL/DPS256S8PLL DESCRIPTION: The DPS256S8P/PL/PLL is a 256K x 8 high-density, low-power static RAM module comprised of two 128K x 8 monolithic SRAM's, an advanced high-speed CMOS decoder and decoupling capacitors surface

Contextual Info: DPE6434 64K X 32 CMOS EEPROM MODULE DESCRIPTION: The DPE6434 is a high-performance Electrically Erasable and Programmable Read O nly M emory EEPRO M module and may be organized as 64K X 32, 128K X 16 or 256K X 8. The module is built with eight low-power C M O S 32K X 8

Contextual Info: □ P r ò Dense-Pac * Microsystems. Inc ^ 2 Megabit High Speed CM OS SRAM DPS256S8AP DESCRIPTION: The DPS256S8AP is a high speed 256K X 8 high-density static RAM module comprised of two 128K X 8 monolithic SRAM's, an advanced high-speed CM OS decoder and decoupling capacitors surface mounted