30033 ENCODER Search Results

SMT 3362

Abstract: INVERTER 10kW 3.3KW motor Nemic-Lambda logo IEEE488 Genesys Logic genesys lambda gen 150 tdk lambda 10-1000 motor 400VAC 10kW
Contextual Info: Genesys TM Programmable DC Power Supplies 10/15kW in 3U Built in RS-232 & RS-485 Interface Parallel Current Summing Optional Interfaces: USB Compliant LAN IEEE488.2 SCPI Multi-Drop Isolated Analog Interface GenesysTM Family GEN H 750W Half Rack GEN 1U 750/1500W Full Rack

Contextual Info: TM Genesys Programmable DC Power Supplies 10/15kW in 3U Built in RS-232 & RS-485 Interface Parallel Current Summing Optional Interfaces: USB Compliant LAN IEEE488.2 SCPI Multi-Drop Isolated Analog Interface GenesysTM Family GEN H 750W Half Rack GEN 1U 750/1500W Full Rack

ORCA ORT42G5

Contextual Info: ORCA ORT42G5 and ORT82G5 3.7 Gbits/s XAUI and 4.25 Gbits/s FC FPSCs January 2004 Data Sheet Introduction Lattice Semiconductor has developed a family of next generation FPSCs intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the

484-pin BGA

Abstract: JC-115
Contextual Info: ORCA ORT42G5 and ORT82G5 0.6 to 3.7 Gbits/s XAUI and FC FPSCs March 2003 Data Sheet Introduction Lattice Semiconductor has developed a family of next generation FPSCs intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the

L43T

Contextual Info: ORCA ORT42G5 and ORT82G5 06 to 3.7 Gbits/s XAUI and FC FPSCs November 2007 Data Sheet DS1027 Introduction Lattice Semiconductor has developed a family of next generation FPSCs intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the

Contextual Info: ORCA ORT42G5 and ORT82G5 06 to 3.7 Gbits/s XAUI and FC FPSCs August 2004 Data Sheet Introduction Lattice Semiconductor has developed a family of next generation FPSCs intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the

Contextual Info: ORCA ORT82G5 0.6-3.7 Gbits/s 8b/10b Backplane Interface FPSC February 2003 Data Sheet Introduction Lattice Semiconductor has developed a next generation FPSC intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the ORT82G5

AD30102

Abstract: E3P15
Contextual Info: ORCA ORT42G5 and ORT82G5 06 to 3.7 Gbits/s XAUI and FC FPSCs March 2004 Data Sheet Introduction Lattice Semiconductor has developed a family of next generation FPSCs intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the

ORCA ORT42G5

Contextual Info: ORCA ORT42G5 and ORT82G5 3.7 Gbits/s XAUI and 4.25 Gbits/s FC FPSCs November 2003 Data Sheet Introduction Lattice Semiconductor has developed a family of next generation FPSCs intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the

L67c

Abstract: L41C l44c L71C l75c transistor l57c IC L44C DATASHEET l31c L47c l51c
Contextual Info: ORCA ORT42G5 and ORT82G5 06 to 3.7 Gbits/s XAUI and FC FPSCs February 2004 Data Sheet Introduction Lattice Semiconductor has developed a family of next generation FPSCs intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the

l37c 8 pin

Abstract: L41C G40TL l34c L43C L74c L18T l14c L25C ENCODER l31c
Contextual Info: ORCA ORT42G5 and ORT82G5 0.6 to 3.7 Gbps XAUI and FC FPSCs July 2008 Data Sheet DS1027 Introduction Lattice Semiconductor has developed a family of next generation FPSCs intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the

30033 encoder

Contextual Info: ORCA ORT82G5 0.6-3.7 Gbits/s 8b/10b Backplane Interface FPSC February 2003 Data Sheet Introduction Lattice Semiconductor has developed a next generation FPSC intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the ORT82G5

Contextual Info: ORCA ORT42G5 and ORT82G5 06 to 3.7 Gbits/s XAUI and FC FPSCs March 2004 Data Sheet Introduction Lattice Semiconductor has developed a family of next generation FPSCs intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the

l26c

Abstract: l39c L41C IC L44C DATASHEET l31c L37C L40C L43C l54c l65c
Contextual Info: ORCA ORT42G5 and ORT82G5 06 to 3.7 Gbits/s XAUI and FC FPSCs August 2005 Data Sheet Introduction Lattice Semiconductor has developed a family of next generation FPSCs intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the

TL 2272 DECODER

Abstract: 10G BERT TL 2262 L36CA 30132 verilog code 16 bit LFSR in PRBS 10gbps serdes 30014 ap13.6 diode 680-pin
Contextual Info: Data Sheet April, 2002 ORCA ORT82G5 1.0—1.25/2.0—2.5/3.125—3.5 Gbits/s 8b/10b SERDES Backplane Interface FPSC Introduction Lattice has developed a next generation FPSC intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded system-on-chips SoC architecture, the

TL 2272 DECODER

Abstract: 30014 TL 2262 tl 2262 am TL 2272 LU6X14FT Synopsys 2262 encoder l31c ORT82G5
Contextual Info: Preliminary Data Sheet July 2001 ORCA ORT82G5 1.0—1.25/2.0—2.5/3.125 Gbits/s Backplane Interface FPSC Introduction Agere Systems Inc. has developed a next generation FPSC intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable

Contextual Info: Data Sheet January 25, 2002 ORCA ORT82G5 1.0—1.25/2.0—2.5/3.125—3.5 Gbits/s 8b/10b SERDES Backplane Interface FPSC Introduction Lattice has developed a next generation FPSC intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded system-on-chips SoC architecture, the

GEN-30-170

Abstract: GEN60-55 GENH750 GEN-40-125 GEN-20-250 GEN-60-250 GEN-100-100 MB 15066 GEN-125-120 GEN-300-11
Contextual Info: Programmable Power Supplies Edition 1 | 2009 Innovating Reliable Power Innovating Reliable Power 2 Contents Page Genesys 6 Software / Features 7 Product range / how to order 8 Front / rear panel description 10 Specifications 750 / 1500 W 14 Specifications 2400 W

verilog code of prbs pattern generator

Contextual Info: ORCA ORT82G5 1.0-3.7 Gbits/s 8b/10b Backplane Interface FPSC October 2002 Preliminary Data Sheet Introduction Lattice Semiconductor has developed a next generation FPSC intended for high-speed serial backplane data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the ORT82G5

INVERTER 10kW

Abstract: ha essex rem 60AMP 24 VDC motor driver 749809-9 PC DB25 PT 10KW 15KW Mod jack RJ45 shld vertical sec57 10kw inverter
Contextual Info: TECHNICAL MANUAL FOR GENESYSTM 10KW/15KW Programmable DC Power Supplies Document: 83-530-000 Rev G TDK-Lambda Americas Inc. High Power Division 405 Essex Road, Neptune, NJ 07753 Tel: 732 922-9300 Fax: (732) 922-9334 www.us.TDK-Lambda.com/HP WARRANTY This TDK-Lambda Americas Inc. product is warranted against defects in materials and workmanship for

DIP40

Abstract: INS8250 LQFP48 PLCC44 SC16C2550 SC16C2550IA44 SC16C2550IN40 SC16C550 ST16C2550
Contextual Info: SC16C2550 Dual UART with 16 bytes of transmit and receive FIFOs and infrared IrDA encoder/decoder Rev. 03 — 19 June 2003 Product data 1. Description The SC16C2550 is a 2 channel Universal Asynchronous Receiver and Transmitter (UART) used for serial data communications. Its principal function is to convert

D1485

Abstract: alarm clock verilog code 10Gb CDR D1488 free verilog code of prbs pattern generator D1486 BD-9F DDR pinout d1487 64b/66b encoder
Contextual Info: ispLever CORE TM 10Gb Ethernet XGXS IP Core User’s Guide User’s Guide July 2003 ipug15_01 Lattice Semiconductor 10Gb Ethernet XGXS IP Core User’s Guide Introduction Lattice’s 10GbE XGXS core provides an ideal solution that meets the need of today’s LAN/WAN applications. The

verilog code of parallel prbs pattern generator

Contextual Info: ispLever CORE TM 10Gb Ethernet XGXS IP Core User’s Guide April 2004 ipug15_02 Lattice Semiconductor 10Gb Ethernet XGXS IP Core User’s Guide Introduction Lattice’s 10GbE XGXS core provides an ideal solution that meets the need of today’s LAN/WAN applications. The

L130C

Abstract: L74c l31c l97c l65c A311TC l146c l48c L202C L235C
Contextual Info: ORCA ORSPI4 Dual SPI4 Interface and High-Speed SERDES FPSC May 2009 Data Sheet Lattice Semiconductor has developed a next-generation FPSC targeted at high-speed data transmission. Built on the Series 4 reconfigurable embedded System-on-a-Chip SoC architecture, the ORSPI4 FPSC contains two